MAX15023 Datasheet, PDF (22/28 Pages) Maxim Integrated Products – Wide 4.5V to 28V Input, Dual-Output Synchronous Buck Controller

Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
4) Place the second zero (f_Z2) at 0.2 x f_O or at f_PO,
whichever is lower and calculate R₁ using the fol-
lowing equation:
R₁
=
2π
×
1
f_Z2
× C_I
− R_I
5) Place the third pole (f_P3) at half the switching fre-
quency and calculate C_CF:
( ) ^{CCF =}
C_F
2π × 0.5 × f_SW × R_F × C_F
−1
6) Calculate R₂ as:
R₂
=
V_FB
V_OUT − V_FB
× R₁
MOSFET Selection
The MAX15023’s step-down controller drives two exter-
nal logic-level n-channel MOSFETs as the circuit switch
elements. The key selection parameters to choose
these MOSFETs include:
• On-resistance (R_DS(ON) )
• Maximum drain-to-source voltage (V_DS(MAX) )
• Minimum threshold voltage (V_TH(MIN) )
• Total gate charge (Qg)
• Reverse transfer capacitance (C_RSS)
• Power dissipation
VOUT
RI
R1
CI
R2
VREF
CCF
RF
CF
gm
COMP
Figure 5. Type III Compensation Network
All four n-channel MOSFETs must be a logic-level type
with guaranteed on-resistance specifications at V_GS =
4.5V. For maximum efficiency, choose a high-side
MOSFET (NH_) that has conduction losses equal to the
switching losses at the typical input voltage. Ensure
that the conduction losses at minimum input voltage do
not exceed MOSFET package thermal limits, or violate
the overall thermal budget. Also, ensure that the con-
duction losses plus switching losses at the maximum
input voltage do not exceed package ratings or violate
the overall thermal budget. Ensure that the MAX15023
DL_ gate drivers can drive a low-side MOSFET (NL_).
In particular, check that the dV/dt caused by NH_ turn-
ing on does not pull up the NL_ gate through NL_’s
drain-to-gate capacitance. This is the most frequent
cause of cross-conduction problems.
Gate-charge losses are dissipated by the driver and do
not heat the MOSFET. Therefore, if the drive current is
taken from the internal LDO regulator, the power dissi-
pation due to drive losses must be checked. All
MOSFETs must be selected so that their total gate
charge is low enough; therefore, V_CC can power all four
drivers without overheating the IC:
P_DRIVE = V_IN × Q_{G _ TOTAL} × f_SW
where Q_{G_TOTAL} is the sum of the gate charges of all
four MOSFETs.
Power Dissipation
Device’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the device package, PCB copper
area, other thermal mass, and airflow.
The power dissipated into the package (P_T) depends on
the supply configuration (see the Typical Application
Circuits). It can be calculated using the following equation:
P_T = V_IN x I_IN
For the circuits of Figures 7 and 8:
P_T = V_CC x (I_IN + I_VCC)
where V_IN and V_CC are the voltages at the respective
pins, I_IN is the current at the input of the internal LDO
(I_IN is practically zero for the circuits of Figures 7 and
8), I_VCC is the current consumed by the internal core
and drivers when the internal regulator is unused for 5V
supply operation (IN = V_CC). See the corresponding
Typical Operating Characteristics for the typical curves
of I_IN and I_VCC current consumption vs. operating fre-
quency at various load capacitance values.
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