MAX15023 Datasheet, PDF (16/28 Pages) Maxim Integrated Products – Wide 4.5V to 28V Input, Dual-Output Synchronous Buck Controller

Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
In case of a nonideal short circuit applied at the output,
the output voltage equals the output impedance times the
limited inductor current during this phase. After reaching
the maximum allowable limit of the soft-start duration
(twice the normal soft-start time), the controller remains off
for 7936 clock cycles before trying to soft-start again.
Undervoltage Lockout
The MAX15023 has an internal undervoltage lockout
(UVLO) circuit to monitor the voltage on V_CC. The
UVLO circuit prevents the MAX15023 from operating if
the voltages for the MOSFET drivers or for the internal
control functions are too low. The V_CC falling threshold
is 3.8V (typ), with 430mV hysteresis to prevent chatter-
ing on the rising/falling edge of the supply voltage.
Before V_CC reaches UVLO rising threshold voltage,
DL_ and DH_ stay low to inhibit switching.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation
in the MAX15023. When the device’s die-junction tem-
perature exceeds T_J = +150°C, an on-chip thermal sen-
sor shuts down the device, forcing DL_ and DH_ low,
allowing the IC to cool. The thermal sensor turns the
device on again after the junction temperature cools by
20°C. During thermal shutdown, the regulators shut
down, and soft-start is reset. Thermal-overload protection
can be triggered by power dissipation in the LDO regula-
tor, by excessive driving losses, or by both. Therefore,
carefully evaluate the total power dissipation (see the
Power Dissipation section) to avoid unwanted triggering
of the thermal-overload protection in normal operation.
Design Procedure
Effective Input Voltage Range
Although the MAX15023 controllers can operate from
input supplies up to 28V and regulate down to 0.6V, the
minimum voltage conversion ratio (V_OUT/V_IN) might be
limited by the minimum controllable on-time. For proper
fixed-frequency PWM operation, the voltage conversion
ratio should obey the following condition:
V_OUT
V_IN
> t_ON(MIN)
× f_SW
where t_ON(MIN) is 100ns (max) and f_SW is the switching
frequency in Hertz. If the desired voltage conversion
does not meet the above condition, then pulse skipping
occurs to decrease the effective duty cycle. To avoid
this, decrease the switching frequency or lower the
input voltage V_IN.
The maximum voltage conversion ratio is limited by the
maximum duty cycle (D_max):
V_OUT
V_IN
<
D_max
−
D_max
×
V_DROP2
+ (1− D_max)
V_IN
×
V_DROP1
where V_DROP1 is the sum of the parasitic voltage drops
in the inductor discharge path, including synchronous
rectifier, inductor, and PCB resistances. V_DROP2 is the
sum of the resistances in the charging path, including
high-side switch, inductor, and PCB resistances. In
practice, the above condition should be met with ade-
quate margin for good load-transient response.
Setting the Enable Input (EN_)
Each controller has an enable input referenced to an
analog voltage (1.2V). When the voltage exceeds 1.2V,
the regulator is enabled. To set a specific turn-on
threshold that can act as a secondary UVLO, a resistive
divider circuit can be used (see Figure 2)
Select R₂ (EN_ to SGND resistor) to a value lower than
200kΩ. Calculate R₁ (V_MON to EN_ resistor) with the fol-
lowing equation:
R₁
=
R₂
⎡⎛
⎣⎢⎢⎝⎜
V_MON
V_{EN_ H_}
⎞
⎠⎟
−
⎤
1⎥
⎦⎥
where V_{EN_H_} = 1.2V (typical).
EN_
MA15023
VMON
R1
R2
Figure 2. Adjustable Enable Voltage
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