MAX1401 Datasheet, PDF (21/36 Pages) Maxim Integrated Products – +3V, 18-Bit, Low-Power, Multichannel, Oversampling Sigma-Delta ADC

+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
Table 10. Transfer-Function Register Mapping—Gain-Calibration Mode (M1 = 1, M0 = 0)
SCAN
DIFF
A1
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
0
X
1
1
X
1
1
X
1
1
X
1
1
X
1
1
X
1
1
1
A0
CHANNEL
TRANSFER-
FUNCTION REGISTER
0
CALGAIN+–CALGAIN-
1
1
CALGAIN+–CALGAIN-
1
0
CALGAIN+–CALGAIN-
2
1
CALGAIN+–CALGAIN-
2
0
CALGAIN+–CALGAIN-
1
1
CALGAIN+–CALGAIN-
2
0
CALGAIN+–CALGAIN-
3
1
Do Not Use
X
AIN1–AIN6
1
X
AIN2–AIN6
1
X
AIN3–AIN6
2
X
AIN4–AIN6
2
X
AIN5–AIN6
3
X
CALOFF+–CALOFF-
3
X
CALGAIN+–CALGAIN-
3
X
AIN1–AIN2
1
X
AIN3–AIN4
2
X
AIN5–AIN6
3
X
CALOFF+–CALOFF-
3
X
CALGAIN+–CALGAIN-
3
1
Do Not Use
X = Don’t care
Data Register (Read-Only)
The data register is a 24-bit, read-only register. Any
attempt to write data to this location will have no effect.
If a write operation is attempted, 8 bits of data must be
clocked into the part before it will return to its normal
idle mode, expecting a write to the communications
register.
Data is output MSB first, followed by three reserved 0
bits and a 3-bit channel ID tag indicating the channel
from which the data originated.
D17–D0: The conversion result. D17 is the MSB. The
result is in offset binary format. 00 0000 0000 0000
0000 represents the minimum value and 11 1111 1111
1111 1111 represents the maximum value. Inputs
exceeding the available input range are limited to the
corresponding minimum or maximum output values.
0: These reserved bits will always be 0.
CID2–0: Channel ID tag (Table 11).
Data Register (Read-Only) Bits
First Bit (Data MSB)
DATA BITS
D17
D16
D15
D14
D13
D12
D11
D10
DATA BITS
D9
D8
D7
D6
D5
D4
D3
D2
(Data LSB)
DATA BITS
D1
D0
RESERVED BITS
‘0’
‘0’
‘0’
CID2
CHANNEL ID TAG
CID1
(LSB)
CID0
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