MAX12559 Datasheet, PDF (20/30 Pages) Maxim Integrated Products – Dual, 96Msps, 14-Bit, IF/Baseband ADC

Dual, 96Msps, 14-Bit, IF/Baseband ADC
0x1FFF
0x1FFE
0x1FFD
1 LSB = 4/3 x (V_REFP - V_REFN) / 16,384
2/3 x (V_REFP - V_REFN)
2/3 x (V_REFP - V_REFN)
0x2000
0x2001
0x2003
1 LSB = 4/3 x (V_REFP - V_REFN) / 16,384
2/3 x (V_REFP - V_REFN)
2/3 x (V_REFP - V_REFN)
0x0001
0x0000
0x3FFF
0x3001
0x3000
0x1000
0x2003
0x2002
0x2001
0x2000
-8191 -8189
-1 0 +1
+8189 +8191
DIFFERENTIAL INPUT VOLTAGE (LSB)
Figure 6. Two’s-Complement Transfer Function (G/T = 0)
The MAX12559 output data format is either Gray code
or two’s complement depending on the logic input G/T.
With G/T high, the output data format is Gray code.
With G/T low, the output data format is set to two’s com-
plement. See Figure 8 for a binary-to-Gray and Gray-to-
binary code conversion example.
The following equations, Table 3, Figure 6, and Figure 7
define the relationship between the digital output and
the analog input.
Gray Code (G/T = 1):
V_{IN_P} - V_{IN_N} = 2/3 x (V_{REF_P} - V_{REF_N}) x 2 x
(CODE₁₀ - 8192) / 16,384
Two’s Complement (G/T = 0):
V_{IN_P} - V_{IN_N} = 2/3 x (V_{REF_P} - V_{REF_N}) x 2 x
CODE₁₀ / 16,384
where CODE₁₀ is the decimal equivalent of the digital
output code as shown in Table 3.
The digital outputs D0A/B–D13A/B are high impedance
when the MAX12559 is in power-down (PD = 1) mode.
D0A/B–D13A/B enter this state 10ns after the rising
edge of PD and become active again 10ns after PD
transitions low.
Keep the capacitive load on the MAX12559 digital out-
puts D0A/B–D13A/B as low as possible (< 15pF) to
avoid large digital currents feeding back into the ana-
log portion of the converter and degrading its dynamic
0x0002
0x0003
0x0001
0x0000
-8191 -8189
-1 0 +1
+8189 +8191
DIFFERENTIAL INPUT VOLTAGE (LSB)
Figure 7. Gray-Code Transfer Function (G/T = 1)
performance. Adding external digital buffers on the dig-
ital outputs helps isolate the MAX12559 from heavy
capacitive loads. To improve the dynamic performance
of the MAX12559, add 220Ω resistors in series with the
digital outputs close to the MAX12559. Refer to the
MAX12559 EV kit schematic for guidelines of how to
drive the digital outputs through 220Ω series resistors
and external digital output buffers.
Power-Down Input
The MAX12559 has two power modes that are con-
trolled with a power-down digital input (PD). With PD
low, the converter is in its normal operating mode. With
PD high, the MAX12559 is in power-down mode.
The power-down mode allows the MAX12559 to effi-
ciently use power by transitioning to a low-power state
when conversions are not required. Additionally, the
MAX12559 parallel output bus goes high impedance in
power-down mode, allowing other devices on the bus
to be accessed.
In power-down mode all internal circuits are off, the
analog supply current reduces to less than 50µA, and
the digital supply current reduces to 1µA. The following
list shows the state of the analog inputs and digital out-
puts in power-down mode.
1) INAP/B, INAN/B analog inputs are disconnected
from the internal input amplifier (Figure 3).
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