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MAX1198 Datasheet, PDF (2/22 Pages) Maxim Integrated Products – Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
ABSOLUTE MAXIMUM RATINGS
VDD, OVDD to GND ...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND ...............................-0.3V to VDD
REFIN, REFOUT, REFP, REFN,
COM, CLK to GND .................................-0.3V to (VDD + 0.3V)
OE, PD, SLEEP, T/B, D7A–D0A,
D7B–D0B to OGND .............................-0.3V to (OVDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
48-Pin TQFP (derate 12.5mW/°C above +70°C).........1000mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = 3.3V, OVDD = 2.5V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10kΩ resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs, fCLK = 100MHz, TA = TMIN to TMAX, unless
otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at
TA = +25°C.)
PARAMETER
DC ACCURACY
Resolution
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
8
Bits
Integral Nonlinearity
INL
fIN = 7.5MHz (Note 1)
±0.3
±1
LSB
Differential Nonlinearity
DNL
fIN = 7.5MHz, no missing codes guaranteed
(Note 1)
±0.2
±1
LSB
Offset Error
Gain Error
Gain Temperature Coefficient
±100
±4
%FS
±4
%FS
ppm/°C
ANALOG INPUT
Differential Input Voltage Range
VDIFF Differential or single-ended inputs
±1.0
V
Common-Mode Input Voltage
Range
VCM
VDD / 2
±0.2
V
Input Resistance
Input Capacitance
CONVERSION RATE
RIN
Switched capacitor load
CIN
57
kΩ
5
pF
Maximum Clock Frequency
fCLK
100
MHz
Data Latency
5
Clock
Cycles
DYNAMIC CHARACTERISTICS (fCLK = 100MHz, 4096-point FFT)
fINA or B = 7.5MHz at -1dB FS
48.5
Signal-to-Noise Ratio
SNR
fINA or B = 20MHz at -1dB FS
fINA or B = 50MHz at -1dB FS
47.0 48.3
dB
48.3
fINA or B = 115.1MHz at -1dB FS
48.1
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