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MAX1196 Datasheet, PDF (2/23 Pages) Maxim Integrated Products – Dual 8-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs
Dual 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs
ABSOLUTE MAXIMUM RATINGS
VDD, OVDD to GND .............................................. -0.3V to +3.6V
OGND to GND...................................................... -0.3V to +0.3V
Continuous Power Dissipation (TA = +70°C)
48-Pin TQFP (derate 12.5mW/°C above +70°C)........1000mW
INA+, INA-, INB+, INB- to GND ...............................-0.3V to VDD
REFIN, REFOUT, REFP, REFN, COM,
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
CLK to GND............................................-0.3V to (VDD + 0.3V)
OE, PD, SLEEP, T/B,
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
D7A/B–D0A/B, A/B to OGND...............-0.3V to (OVDD + 0.3V)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = OVDD = 3V, 0.1µF and 2.2µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a 10kΩ
resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 5), fCLK = 40MHz, TA = TMIN to TMAX,
unless otherwise noted. ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values
are at TA = +25°C.)
PARAMETER
DC ACCURACY
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Resolution
Integral Nonlinearity
INL
fIN = 7.51MHz (Note 1)
8
Bits
±0.3
±1
LSB
Differential Nonlinearity
DNL
fIN = 7.51MHz, no missing codes
guaranteed (Note 1)
±0.15 ±1
LSB
Offset Error
Gain Error
Gain Temperature Coefficient
ANALOG INPUT
Differential Input Voltage Range
VDIFF Differential or single-ended inputs
±100
±1.0
±4
%FS
±4
%FS
ppm/°C
V
Common-Mode Input Voltage
Range
VCM
VDD / 2
± 0.2
V
Input Resistance
Input Capacitance
CONVERSION RATE
RIN
Switched capacitor load
CIN
140
kΩ
5
pF
Maximum Clock Frequency
Data Latency
fCLK
CHA
CHB
40
5
5.5
MHz
Clock
Cycles
DYNAMIC CHARACTERISTICS (fCLK = 40MHz)
fINA or B = 2MHz at -1dB FS
Signal-to-Noise Ratio
SNR
fINA or B = 7.5MHz at -1dB FS
fINA or B = 20MHz at -1dB FS
fINA or B = 101MHz at -1dB FS
fINA or B = 2MHz at -1dB FS
Signal-to-Noise and Distortion
SINAD
fINA or B = 7.5MHz at -1dB FS
fINA or B = 20MHz at -1dB FS
fINA or B = 101MHz at -1dB FS
48.7
48.7
dB
47.5 48.5
48
48.6
48.7
dB
47
48.4
48
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