 English |
|
|
|
|
|
|
|
| MAX1184 Datasheet, PDF (2/21 Pages) Maxim Integrated Products – Dual 10-Bit, 20Msps, +3V, Low-Power ADC with Internal Reference and Parallel Outputs | |||
| |||
| ◁ |
Dual 10-Bit, 20Msps, +3V, Low-Power ADC with
Internal Reference and Parallel Outputs
ABSOLUTE MAXIMUM RATINGS
VDD, OVDD to GND...............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND ...............................-0.3V to VDD
REFIN, REFOUT, REFP, REFN, CLK,
COM to GND ..........................................-0.3V to (VDD + 0.3V)
OE, PD, SLEEP, T/B, D9AâD0A,
D9BâD0B to OGND .............................-0.3V to (OVDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
48-Pin TQFP (derate 12.5mW/°C above +70°C).......1000mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under âAbsolute Maximum Ratingsâ may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +3V, OVDD = +2.5V, 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through
a 10k⦠resistor, VIN = 2Vp-p (differential w.r.t. COM), CL = 10pF at digital outputs (Note 5), fCLK = 20MHz, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
ANALOG INPUT
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
INL
DNL
fIN = 7.5MHz
fIN = 7.5MHz, no missing codes guaranteed
10
Bits
±0.5 ±1.5 LSB
±0.25 ±1.0 LSB
< ±1 ±1.7 % FS
0
±2 % FS
Differential Input Voltage
Range
VDIFF Differential or single-ended inputs
±1.0
V
Common-Mode Input Voltage
Range
Input Resistance
Input Capacitance
CONVERSION RATE
Maximum Clock Frequency
Data Latency
VCM
RIN
CIN
Switched capacitor load
fCLK
VDD/2
± 0.5
100
5
20
5
V
kâ¦
pF
MHz
Clock
Cycles
DYNAMIC CHARACTERISTICS (fCLK = 20MHz, 4096-point FFT)
Signal-to-Noise Ratio
SNR
fINA or B = 7.5MHz, TA = +25°C
fINA or B = 12MHz
Signal-to-Noise and Distortion
SINAD
fINA or B = 7.5MHz, TA = +25°C
fINA or B = 12MHz
Spurious-Free Dynamic Range
SFDR
fINA or B = 7.5MHz, TA = +25°C
fINA or B = 12MHz
57.3 59.5
dB
59.4
57
59.4
dB
59.2
64
74
dBc
72
2 _______________________________________________________________________________________
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese