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DS75LV Datasheet, PDF (2/13 Pages) Maxim Integrated Products – Digital Thermometer and Thermostat
ABSOLUTE MAXIMUM RATINGS*
Voltage on VDD, Relative to Ground
Voltage on Any Other Pin, Relative to Ground
Operating Temperature Range
Storage Temperature Range
Soldering Temperature
DS75LV: Digital Thermometer and Thermostat
-0.3V to +4.0V
-0.3V to +6.0V
-55°C to +125°C
-55°C to +125°C
260°C for 10 seconds
These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
The Dallas Semiconductor DS75LV is built to the highest quality standards and manufactured for long-term
reliability. All Dallas Semiconductor devices are made using the same quality materials and manufacturing
methods. However, the DS75LV is not exposed to environmental stresses, such as burn-in, that some industrial
applications require. For specific reliability information on this product, please contact the factory in Dallas at (972)
371-4448.
DC ELECTRICAL CHARACTERISTICS
(-55°C to +125°C; 1.7V £ VDD £ 3.7V.)
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
Thermometer Error
(Note 2)
VDD
TERR
(Note 10)
-25 to +100
-55 to +125
Input Logic High
Input Logic Low
SDA Output Logic Low
Voltage (Note 1)
VIH
VIL
VOL1
VOL2
(Note 1)
(Note 1)
3mA sink current
6mA sink current
MIN
1.7
0.7 × VDD
-0.5
0
0
MAX
3.7
± 2.0
± 3.0
5.5
0.3 × VDD
0.4
0.6
UNITS
V
°C
V
V
V
O.S. Saturation Voltage
Input current each I/O pin
I/O Capacitance
Standby Current
Active Current
(Notes 3, 4)
VOL
4mA sink current
(Notes 1, 2)
0.4 < VI/O< 0.9 VDD
CI/O
IDD1
(Notes 3, 4)
Active Temp
IDD
Conversions
Communication only
0.8
V
-10
+10
mA
10
pF
2
mA
1000
mA
100
AC ELECTRICAL CHARACTERISTICS
(-55°C to +125°C; 1.7V £ VDD £ 3.7V.)
PARAMETER
SYMBOL
CONDITION
Resolution
9-bit conversions
MIN
TYP MAX UNITS
9
12
bits
25
Temperature Conversion
Time
tCONVT
10-bit conversions
11-bit conversions
50
ms
100
SCL Frequency
Bus Free Time Between a
STOP and START
Condition
START and Repeated
START Hold Time from
12-bit conversions
fSCL
tBUF
(Note 5)
tHD:STA
(Notes 5, 6)
2 of 13
200
400 KHz
1.3
ms
600
ns