DS26524 Datasheet, PDF (198/273 Pages) Maxim Integrated Products – Quad T1/E1/J1 Transceiver

DS26524 Quad T1/E1/J1 Transceiver
Register Name:
Register Description:
Register Address:
TCR3
Transmit Control Register 3
183h + (200h x n): where n = 0 to 3, for Ports 1 to 4
Bit #
Name
Default
7
ODF
ODF
0
6
ODM
ODM
0
5
TCSS1
TCSS1
0
4
TCSS0
TCSS0
0
3
MFRS
MFRS
0
2
TFM
—
0
Bit 7: Output Data Format (ODF).
0 = bipolar data at TTIP and TRING
1 = NRZ data at TTIP; TRING = 0
Bit 6: Output Data Mode (ODM).
0 = pulses at TTIP and TRING are one full TCLK period wide
1 = pulses at TTIP and TRING are 1/2 TCLK period wide
Bits 5 and 4: Transmit Clock Source Select 1 and 0 (TCSS[1:0]).
1
IBPV
IBPV
0
0
TLOOP
CRC4R
0
TCSS1
0
0
1
1
TCSS0
0
1
0
1
TRANSMIT CLOCK SOURCE
The TCLK pin is always the source of transmit clock.
Switch to the clock present at RCLK when the signal at the TCLK pin fails to transition after
one channel time.
Reserved
Use the signal present at RCLK as the transmit clock. The TCLK pin is ignored.
Bit 3: Multiframe Reference Select (MFRS). This bit selects the source for the transmit formatter multiframe
boundary.
0 = Normal operation. Transmit multiframe boundary is determined by line-side counters referenced to
TSYNC when TSYNC is an input. Free-running when TSYNC is an output.
1 = Pass-forward operation. Transmit multiframe boundary determined by system-side counters referenced
to TSSYNCIO (input mode 3), which is then passed forward to the line-side clock domain. This mode can
only be used when the transmit elastic store is enabled with a synchronous backplane (i.e., no frame slips
allowed). This mode must be used to allow transmit hardware-signaling insertion while the transmit elastic
store is enabled.
Bit 2: Transmit Frame Mode Select (TFM) (T1 Mode Only).
0 = ESF framing mode
1 = D4 framing mode
Bit 1: Insert BPV (IBPV). A 0-to-1 transition on this bit will cause a single bipolar violation (BPV) to be inserted into
the transmit data stream. Once this bit has been toggled from 0 to 1, the device waits for the next occurrence of
three consecutive ones to insert the BPV. This bit must be cleared and set again for a subsequent error to be
inserted.
Bit 0 (T1 Mode): Transmit Loop Code Enable (TLOOP). See Section 8.9.15 for details.
0 = transmit data normally
1 = replace normal transmitted data with repeating code as defined in registers T1TCD1 and T1TCD2
Bit 0 (E1 Mode): CRC-4 Recalculate (CRC4R).
0 = transmit CRC-4 generation and insertion operates in normal mode
1 = transmit CRC-4 generation operates according to G.706 Intermediate Path Recalculation method
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