DS26524 Datasheet, PDF (151/273 Pages) Maxim Integrated Products – Quad T1/E1/J1 Transceiver

DS26524 Quad T1/E1/J1 Transceiver
Register Name:
Register Description:
Register Address:
RIBOC
Receive Interleave Bus Operation Control Register
088h + (200h x n): where n = 0 to 3, for Ports 1 to 4
Bit #
7
Name
—
Default
0
6
5
4
3
2
1
0
IBS1
IBS0
IBOSEL IBOEN
DA2
DA1
DA0
0
0
0
0
0
0
0
Bits 6 and 5: IBO Bus Size Bits (IBS[1:0]). Indicates how many devices on the bus.
IBS1
0
0
1
1
IBS0
0
1
0
1
BUS SIZE
2 devices on bus (4.096MHz)
4 devices on bus (8.192MHz)
8 devices on bus (16.384MHz)
Reserved for future use
Bit 4: Interleave Bus Operation Select (IBOSEL). This bit selects channel or frame interleave mode.
0 = Channel Interleave
1 = Frame Interleave
Bit 3: Interleave Bus Operation Enable (IBOEN).
0 = interleave bus operation disabled
1 = interleave bus operation enabled
Bits 2 to 0: Device Assignment Bits (DA[2:0]).
DA2
0
0
0
0
1
1
1
1
DA1
0
0
1
1
0
0
1
1
DA0
0
1
0
1
0
1
0
1
DEVICE POSITION
1st device on bus
2nd device on bus
3rd device on bus
4th device on bus
5th device on bus
6th device on bus
7th device on bus
8th device on bus
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