MAX1282 Datasheet, PDF (19/24 Pages) Maxim Integrated Products – 300ksps/400ksps, Single-Supply, 4-Channel, Serial 12-Bit ADCs with Internal Reference

300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
+3.3V
24k
100k
510k
0.047µF
MAX1282
MAX1283
REFADJ
12
Figure 12. MAX1282/MAX1283 Reference-Adjust Circuit
OUTPUT CODE
11 . . . 111
11 . . . 110
11 . . . 101
FULL-SCALE
TRANSITION
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
01
(COM)
23
INPUT VOLTAGE (LSB)
FS = V_REF + V_COM
ZS = V_COM
1LSB = ^VREF
4096
FS
FS - 3/2LSB
Figure 13. Unipolar Transfer Function, Full Scale (FS) =
V_REF + V_COM, Zero Scale (ZS) = V_COM
TMS320LC3x Interface
Figure 17 shows an application circuit to interface the
MAX1282/MAX1283 to the TMS320 in external clock
mode. The timing diagram for this interface circuit is
shown in Figure 18.
Use the following steps to initiate a conversion in the
MAX1282/MAX1283 and to read the results:
1) The TMS320 should be configured with CLKX (trans-
mit clock) as an active-high output clock and CLKR
(TMS320 receive clock) as an active-high input clock.
CLKX and CLKR on the TMS320 are connected to
the MAX1282/MAX1283’s SCLK input.
OUTPUT CODE
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
FS = ^VREF
2
+ V_COM
ZS = V_COM
-FS =
-V_REF
2
+
V_COM
1LSB = ^VREF
4096
100 . . . 001
100 . . . 000
- FS
*V_COM V_REF / 2
COM*
INPUT VOLTAGE (LSB)
+FS - 1LSB
Figure 14. Bipolar Transfer Function, Full Scale (FS) =
V_REF / 2 + V_COM, Zero Scale (ZS) = V_COM
2) The MAX1282/MAX1283’s CS pin is driven low by the
TMS320’s XF_ I/O port to enable data to be clocked
into the MAX1282/MAX1283’s DIN pin.
3) An 8-bit word (1XXXXX11) should be written to the
MAX1282/MAX1283 to initiate a conversion and
place the device into normal operating mode. See
Table 3 to select the proper XXXXX bit values for your
specific application.
4) The MAX1282/MAX1283’s SSTRB output is moni-
tored through the TMS320’s FSR input. A falling
edge on the SSTRB output indicates that the conver-
sion is in progress and data is ready to be received
from the device.
5) The TMS320 reads in 1 data bit on each of the next
16 rising edges of SCLK. These data bits represent
the 12-bit conversion result followed by 4 trailing bits,
which should be ignored.
6) Pull CS high to disable the MAX1282/MAX1283 until
the next conversion is initiated.
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