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MAX11606 Datasheet, PDF (19/22 Pages) Maxim Integrated Products – 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/8-/12-Channel, 2-Wire Serial 10-Bit ADCs
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/8-/12-Channel, 2-Wire Serial 10-Bit ADCs
OUTPUT CODE
011 . . . 111
011 . . . 110
000 . . . 010
000 . . . 001
000 . . . 000
111 . . . 111
111 . . . 110
111 . . . 101
FS = VREF
2
ZS = 0
-FS = -VREF
2
1 LSB = VREF
1024
MAX11606–
MAX11611
100 . . . 001
100 . . . 000
- FS
0
INPUT VOLTAGE (LSB)
*VCOM ≥ VREF/2 *VIN = (AIN+) - (AIN-)
Figure 13. Bipolar Transfer Function
+FS - 1 LSB
3V OR 5V
SUPPLIES
VLOGIC = 3V/5V GND
R* = 5Ω
4.7μF
0.1μF
VDD
GND
3V/5V DGND
MAX11606–
MAX11611
DIGITAL
CIRCUITRY
*OPTIONAL
Figure 14. Power-Supply Grounding Connection
external bypass capacitor and works best when left
unconnected (SEL1 = 0).
External Reference
The external reference can range from 1V to VDD. For
maximum conversion accuracy, the reference must be
able to deliver up to 40µA and have an output imped-
ance of 500Ω or less. If the reference has a higher out-
put impedance or is noisy, bypass it to GND as close
as possible to AIN_/REF with a 0.1µF capacitor.
Transfer Functions
Output data coding for the MAX11606–MAX11611 is
binary in unipolar mode and two’s complement in bipo-
lar mode with 1LSB = (VREF/2N) where N is the number
of bits (10). Code transitions occur halfway between
successive-integer LSB values. Figure 12 and Figure
13 show the input/output (I/O) transfer functions for
unipolar and bipolar operations, respectively.
Layout, Grounding, and Bypassing
Only use PC boards. Wire-wrap configurations are not
recommended since the layout should ensure proper
separation of analog and digital traces. Do not run ana-
log and digital lines parallel to each other, and do not
layout digital signal paths underneath the ADC pack-
age. Use separate analog and digital PCB ground sec-
tions with only one star point (Figure 14) connecting the
two ground systems (analog and digital). For lowest
noise operation, ensure the ground return to the star
ground’s power supply is low impedance and as short
as possible. Route digital signals far away from sensi-
tive analog and reference inputs.
High-frequency noise in the power supply (VDD) could
influence the proper operation of the ADC’s fast com-
parator. Bypass VDD to the star ground with a network of
two parallel capacitors, 0.1µF and 4.7µF, located as
close as possible to the MAX11606–MAX11611 power-
supply pin. Minimize capacitor lead length for best sup-
ply noise rejection, and add an attenuation resistor (5Ω)
in series with the power supply, if it is extremely noisy.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values on
an actual transfer function from a straight line. This straight
line can be either a best straight-line fit or a line drawn
between the endpoints of the transfer function, once offset
and gain errors have been nullified. The MAX11606–
MAX11611’s INL is measured using the endpoint.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
the time between the samples.
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