DS3100 Datasheet, PDF (188/226 Pages) Maxim Integrated Products – Stratum 3/3E Timing Card IC

DS3100 Stratum 3/3E Timing Card IC
Register Name:
Register Description:
Register Address:
BRSa7
BITS Receive Sa7 Bits (E1 only)
58h
Name
Default
Bit 7
Sa7F1
0
Bit 6
Sa7F3
0
Bit 5
Sa7F5
0
Bit 4
Sa7F7
0
Bit 3
Sa7F9
0
Bit 2
Sa7F11
0
Bit 1
Sa7F13
0
Bit 0
Sa7F15
0
The Sa7 bits received in each multiframe are saved in internal registers and latched into this register at the start of
the next CRC-4 multiframe. The CRC-4 multiframe boundary is indicated by the RCMF status bit in BRSR3. See
Section 7.10.6.4.
Bit 7: Sa7 Bit from Frame 1 (Sa7F1).
Bit 6: Sa7 Bit from Frame 3 (Sa7F3).
Bit 5: Sa7 Bit from Frame 5 (Sa7F5).
Bit 4: Sa7 Bit from Frame 7 (Sa7F7).
Bit 3: Sa7 Bit from Frame 9 (Sa7F9).
Bit 2: Sa7 Bit from Frame 11 (Sa7F11).
Bit 1: Sa7 Bit from Frame 13 (Sa7F13).
Bit 0: Sa7 Bit from Frame 15 (Sa7F15).
Register Name:
Register Description:
Register Address:
BRSa8
BITS Receive Sa8 Bits (E1 only)
59h
Name
Default
Bit 7
Sa8F1
0
Bit 6
Sa8F3
0
Bit 5
Sa8F5
0
Bit 4
Sa8F7
0
Bit 3
Sa8F9
0
Bit 2
Sa8F11
0
Bit 1
Sa8F13
0
Bit 0
Sa8F15
0
The Sa8 bits received in each multiframe are saved in internal registers and latched into this register at the start of
the next CRC-4 multiframe. The CRC-4 multiframe boundary is indicated by the RCMF status bit in BRSR3. See
Section 7.10.6.4.
Bit 7: Sa8 Bit from Frame 1 (Sa8F1).
Bit 6: Sa8 Bit from Frame 3 (Sa8F3).
Bit 5: Sa8 Bit from Frame 5 (Sa8F5).
Bit 4: Sa8 Bit from Frame 7 (Sa8F7).
Bit 3: Sa8 Bit from Frame 9 (Sa8F9).
Bit 2: Sa8 Bit from Frame 11 (Sa8F11).
Bit 1: Sa8 Bit from Frame 13 (Sa8F13).
Bit 0: Sa8 Bit from Frame 15 (Sa8F15).
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