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MAX16928_12 Datasheet, PDF (17/20 Pages) Maxim Integrated Products – Automotive TFT-LCD Power Supply with Boost Converter and Gate Voltage Regulators
MAX16928
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
The voltage and current rise and fall times at the LXP
node are equal to tR-V (voltage rise time), tF-V (voltage fall
time), tR-I (current rise time), and tF-I (current fall time),
and are determined as follows:
t R-V
=
VSH
+
VSCHOTTKY
K R-V
t F-V
=
VSH
+
VSCHOTTKY
K F-V
t
R-I
=
IIN(DC,MAX)
K R-I
t
F-I
=
IIN(DC,MAX)
K F-I
KR-V, KF-V, KR-I, and KF-I are the voltage and current
slew rates of the LXP node and are supply dependent.
Use Table 4 to determine their values.
Positive-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
in supplying power to the positive voltage regulator.
Doing so minimizes the drain-source voltage of the inte-
grated pMOS switch and power dissipation. The power
dissipated in the switch is given as:
PGH = (VCP - VGH) × ILOAD(MAX)_GH
Ensure that the voltage on CP does not exceed the
CP overvoltage threshold as given in the Electrical
Characteristics table.
Negative-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
to provide the negative voltage to the negative-gate
voltage regulator. Estimate the power dissipated in the
negative-gate voltage regulator using the following:
PGL = (VINA + |VCN| - VBE) × IDRVN
where VBE is the base-emitter voltage of the external npn
bipolar transistor, and IDRVN is the current sourced from
DRVN to the RBE bias resistor and to the base of the
transistor, which is given by:
IDRVN
= VBE
RBE
+
IGL
h FE +1
1.8V/3.3V Regulator Controller
The power dissipated in the 1.8V/3.3V regulator controller
is given by:
PREG = (VINA - VOUT_REG - VBE) × IDR
where VOUT_REG = 1.8V or 3.3V, VBE is the base-emitter
voltage of the external npn bipolar transistor, and IDR is
the current sourced from DR to the base of the transistor.
IDR is given by:
IDR
=
ILOAD
hFE + 1
where ILOAD is load current of the 1.8V/3.3V regulator
controller, and hFE is the current gain of the transistor.
Total Power Dissipation
The total power dissipated in the package is the sum of
the losses previously calculated. Therefore, total power
dissipation can be estimated as follows:
PT = PLXP + PGH + PGL + PREG
Achieve maximum heat transfer by connecting the
exposed pad to a thermal landing pad and connecting
the thermal landing pad to a large ground plane through
thermal vias.
Table 4. LXP Voltage and Current Slew Rates vs. Supply Voltage
VINA (V)
3.3
5
RISING VOLTAGE
SLEW RATE,
KR-V (V/ns)
0.52
1.35
LXP VOLTAGE AND CURRENT SLEW RATES
FALLING VOLTAGE
SLEW RATE,
KF-V (V/ns)
1.7
2
RISING CURRENT
SLEW RATE,
KR-I (A/ns)
0.13
0.3
FALLING CURRENT
SLEW RATE,
KF-I (A/ns)
0.38
0.44
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