MAX16050 Datasheet, PDF (16/22 Pages) Maxim Integrated Products – Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability

Voltage Monitors/Sequencer Circuits with
Reverse-Sequencing Capability
Enable Hold Input (EN_HOLD)
When EN_HOLD is low, a high-to-low transition on
SHDN or on EN is ignored. EN_HOLD must be high for
SHDN or EN to disable the device. This feature is used
when multiple MAX16050/MAX16051s are daisy-
chained (see Figure 7). Connect EN_HOLD to ABP if
not used.
Delay Time Input (DELAY)
Connect a capacitor (C_DELAY) between DELAY and
GND to adjust the sequencing delay period (t_DELAY)
that occurs between sequenced channels. Use the fol-
lowing formula to estimate the delay:
t_DELAY = 10µs + (500kΩ x C_DELAY)
where t_DELAY is in seconds and C_DELAY is in Farads.
Leave DELAY unconnected for the default 10µs (typ)
delay.
Reset Timeout Input (TIMEOUT)
Connect a capacitor (C_TIMEOUT) from TIMEOUT to
GND to set the reset timeout period. After all SET_
inputs exceed their thresholds (V_TH), RESET remains
low for the programmed timeout period, t_RP, before
deasserting (see Figure 1). Use the following formula to
estimate the reset timeout period:
t_RP = 10µs + (500kΩ x C_TIMEOUT)
where t_RP is in seconds and C_TIMEOUT is in Farads.
Leave TIMEOUT unconnected for the default 10µs (typ)
timeout delay or connect TIMEOUT to ABP to enable a
fixed 128ms (typ) timeout.
Applications Information
Resistor Value Selection
The MAX16050/MAX16051 feature four and five SET_
inputs, respectively, and the threshold voltage (V_TH) at
each SET_ input is 0.5V (typ). To monitor a voltage
V_1TH, connect a resistive divider network to the circuit
as shown in Figure 6, and use the following equation to
calculate the monitored threshold voltage:
V_1TH
=
V_TH
×
⎛⎝⎜₁₊
R1⎞
R2 ⎠⎟
Balance accuracy and power dissipation when choos-
ing the external resistors. The input to the voltage moni-
tor is a high-impedance input with a small 100nA
leakage current. This leakage current contributes to the
overall error of the threshold voltage, and this error is
proportional to the value of the resistors used to set the
threshold. Small-valued resistors reduce the error but
increase the power consumption. Use the following
equation to estimate the value of the resistors based on
the amount of acceptable error:
R₁
=
e_A × V_1TH
I_SET
where e_A is the fraction of the maximum acceptable
absolute resistive divider error attributable to the input
leakage current (use 0.01 for ±1%), V_1TH is the power-
good threshold for the power supply being monitored,
and I_SET is the worst-case SET_ input leakage current
(see the Electrical Characteristics table). Calculate R2
as follows:
R₂
=
V_TH × R₁
V_1TH − V_TH
Pullup Resistor Values
The exact value of the pullup resistors for the open-
drain outputs is not critical, but some consideration
should be made to ensure the proper logic levels when
the device is sinking current. For example, if V_CC =
3.3V and the pullup voltage is 5V, keep the sink current
less than 3.2mA as shown in the Electrical
Characteristics table. As a result, the pullup resistor
should be greater than 1.6kΩ. For a 13.2V pullup, the
resistor should be larger than 4.1kΩ.
Extra care must be taken when using CP_OUT as the
pullup voltage. If multiple pullup resistors are connect-
ed to CP_OUT and one or more of the connected OUT_
outputs are asserted, the current drawn can drop the
CP_OUT voltage enough to prevent an enabled
MOSFET from turning on completely.
V1TH
R1
R2
VBUS
VCC
SET_
RESET
MAX16050
MAX16051
GND
Figure 6. Setting the SET_ Input
16 ______________________________________________________________________________________