MAX15038 Datasheet, PDF (16/18 Pages) Maxim Integrated Products – 4A, 2MHz Step-Down Regulator with Integrated Switches

4A, 2MHz Step-Down Regulator
with Integrated Switches
Setting the second compensation pole, f_{P2_EA}, at
f_{Z_ESR} yields:
R2 = ^{CO x ESR}
C₃
Set the third compensation pole at 1/2 of the switching
frequency. Calculate C2 as follows:
C2 =
1
π × R1 × ƒ_S
The above equations provide application compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
type III compensation close to the switching frequency
if the zero-cross frequency is above 200kHz to boost
the phase margin. The recommended range for R3 is
2kΩ to 10kΩ. Note that the loop compensation remains
unchanged if only R4’s resistance is altered to set dif-
ferent outputs.
MODE Selection
The MAX15038 features a mode selection input
(MODE) that users can select a functional mode for the
device (see Table 2).
Forced-PWM Mode
Connect MODE to GND to select forced-PWM mode. In
forced-PWM mode, the MAX15038 operates at a con-
stant switching frequency (set by the resistor at FREQ
terminal) with no pulse skipping. PWM operation starts
after a brief settling time when EN goes high. The low-
side switch turns on first, charging the bootstrap capaci-
tor to provide the gate-drive voltage for the high-side
switch. The low-side switch turns off either at the end of
the clock period or once the low-side switch sinks
0.875A current (typ), whichever occurs first. If the low-
side switch is turned off before the end of the clock peri-
od, the high-side switch is turned on for the remaining
part of the time interval until the inductor current reaches
0.58A, or the end of clock cycle is encountered.
Starting from the first PWM activity, the sink current
threshold is increased through an internal 4-step DAC
to reach the current limit of 7A after 128 clock periods.
This is done to help a smooth recovery of the regulated
voltage even in case of accidental prebiased output in
spite of the initial forced-PWM mode selection.
Table 2. Mode Selection
MODE CONNECTION
GND
Unconnected or V_DD/2
V_DD
OPERATION MODE
Forced PWM
Forced PWM. Soft-startup into a
prebiased output (monotonic
startup).
Skip Mode. Soft-startup into a
prebiased output (monotonic
startup).
COMPENSATION
TRANSFER
FUNCTION
DOUBLE POLE
OPEN-LOOP
GAIN
THIRD
POLE
GAIN (dB)
POWER-STAGE
TRANSFER
FUNCTION
SECOND
POLE
FIRST AND SECOND ZEROS
Figure 4. Type III Compensation Illustration
Soft-Starting into a Prebiased Output
Mode (Monotonic Startup)
When MODE is left unconnected or biased to V_DD/2, the
MAX15038 soft-starts into a prebiased output without dis-
charging the output capacitor. This type of operation is
also termed monotonic startup. See the Starting into
Prebiased Output waveforms in the Typical Operating
Characteristics section for an example.
In monotonic startup mode, both low-side and high-
side switches remain off to avoid discharging the prebi-
ased output. PWM operation starts when the FB voltage
crosses the SS voltage. As in forced-PWM mode, the
PWM activity starts with the low-side switch turning on
first to build the bootstrap capacitor charge.
The MAX15038 is also able to start into prebiased with
the output above the nominal set point without abruptly
discharging the output, thanks to the sink current con-
trol of the low-side switch through a 4-step DAC in 128
clock cycles. Monotonic startup mode automatically
switches to forced-PWM mode 4096 clock cycles delay
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