MAX15038 Datasheet, PDF (14/18 Pages) Maxim Integrated Products – 4A, 2MHz Step-Down Regulator with Integrated Switches

4A, 2MHz Step-Down Regulator
with Integrated Switches
where the output ripple due to output capacitance,
ESR, and ESL is:
V_RIPPLE(C)
=
8
x
I_{P − P}
C_OUT
x
f_S
V_RIPPLE(ESR) = I_P−P x ESR
V_RIPPLE(ESL)
= ^IP−P
t_ON
x ESL
or:
V_RIPPLE(ESL)
=
I_{P − P}
t_OFF
x
ESL
or whichever is larger.
The peak-to-peak inductor current (I_P-P) is:
I_P−P =
V_IN − V_OUT
f_S × L
x
V_OUT
V_IN
Use these equations for initial output capacitor selec-
tion. Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output-voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output-voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The ripple voltage due to
ESL is negligible when using ceramic capacitors.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
instantly changes by ESR x ∆I_LOAD. Before the con-
troller can respond, the output deviates further,
depending on the inductor and output capacitor val-
ues. After a short time, the controller responds by regu-
lating the output voltage back to its predetermined
value. The controller response time depends on the
closed-loop bandwidth. A higher bandwidth yields a
faster response time, preventing the output from deviat-
ing further from its regulating value. See the Compen-
sation Design section for more details.
Input-Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The total input capacitance must be
equal or greater than the value given by the following
equation to keep the input-ripple voltage within
specification and minimize the high-frequency ripple
current being fed back to the input source:
C_{IN _ MIN}
=
D x T_S x I_OUT
V_{IN−RIPPLE}
where V_IN-RIPPLE is the maximum allowed input ripple
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage. D
is the duty cycle (V_OUT/V_IN) and T_S is the switching
period (1/f_S).
The impedance of the input capacitor at the switching
frequency should be less than that of the input source so
high-frequency switching currents do not pass through
the input source, but are instead shunted through the
input capacitor. The input capacitor must meet the ripple
current requirement imposed by the switching currents.
The RMS input ripple current is given by:
I_RIPPLE = I_LOAD ×
V_OUT × (V_IN − V_OUT )
V_IN
where I_RIPPLE is the input RMS ripple current.
Compensation Design
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the
inductor L and the output capacitor C_O. The ESR of the
output capacitor determines the zero. The double pole
and zero frequencies are given as follows:
f_{P1_LC} = f_{P2_LC} =
1
2π
x
L
x
C_O
x
⎛
⎝⎜
R_O + ESR
R_O + R_L
⎞
⎠⎟
f_{Z_ESR} = _2π
x
1
ESR
x
C_O
where R_L is equal to the sum of the output inductor’s DCR
(DC resistance) and the internal switch resistance,
R_DS(ON). A typical value for R_DS(ON) is 24mΩ (low-side
MOSFET) and 31mΩ (high-side MOSFET). R_O is the out-
put load resistance, which is equal to the rated output
voltage divided by the rated output current. ESR is the
total equivalent series resistance of the output capacitor.
If there is more than one output capacitor of the same
type in parallel, the value of the ESR in the above equa-
tion is equal to that of the ESR of a single output capacitor
divided by the total number of output capacitors.
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