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MAX1407 Datasheet, PDF (16/48 Pages) Maxim Integrated Products – Low-Power, 16-Bit Multichannel DAS with Internal Reference,10-Bit DACs, and RTC
Low-Power, 16-Bit Multichannel DAS with
Internal Reference,10-Bit DACs, and RTC
AVDD
CPLL FOUT CLKIN CLKOUT
DVDD
CS
SCLK
DIN
DOUT
IN3
IN2
IN1
IN0
SERIAL
INTERFACE
OUT2
OUT1
REF
AVDD
8:1
INPUT
MUX
2.4576MHz
PLL
32.768kHz
OSCILLATOR
RTC AND
ALARM
WAKE-UP
LOGIC
MAX1407/MAX1414
COMPARATOR
INTERRUPT
GENERATOR
BUF
DIGITAL
PGA
16-BIT ADC OUTPUT
BUF
WU2
WU1
SHDN
INT
DRDY
D0
FB2
FB1
IN3
IN2
IN1
IN0
REF
AGND
8:1
INPUT
MUX
1.8V/2.7V
µP
SUPERVISORS
RESET
GENERATOR
1.25V
BANDGAP
REFERENCE
BUF
10-BIT DAC
10-BIT DAC
AGND
RESET
REF
*MAX1414 HAS A +50mV SIGNAL-DETECT COMPARATOR THRESHOLD.
DGND
OUT1
FB1
OUT2
FB2
Figure 1. MAX1407/MAX1414 Functional Diagram
With the use of two external resistors, the DAC output
can go from 0.05V to AVDD - 0.2V. The ADCs and
DACs both utilize a precise low-drift 1.25V internal
bandgap reference for conversions and setting of the
full-scale range. For applications that require increased
accuracy, power-down the internal reference and con-
nect an external reference at REF. The RTC is leap year
compensated until 9999 and provides an alarm function
that can be used to wake-up the system or cause an
interrupt at a predefined time. The power-supply volt-
age monitors detect when AVDD falls below a trip
threshold voltage at either +1.8V or +2.7V causing the
reset to be asserted. The 4-wire serial interface is used
to communicate directly between SPI, QSPI, and
MICROWIRE devices for system configuration and
readback functions.
Analog Input Protection
Internal protection diodes clamp the analog input to
AVDD and AGND, which allow the channel input pins to
swing from AGND - 0.3V to AVDD + 0.3V without dam-
age. However, for accurate conversions near full scale,
the inputs must not exceed AVDD by more than 50mV
or be lower than AGND by 50mV.
Analog Mux
The MAX1407/MAX1408/MAX1414 include a dual 8 to 1
multiplexer for the positive and negative inputs of the
ADC. The MAX1409 has a dual 4 to 1 multiplexer at the
inputs of the ADC. Figures 1, 2, and 3 illustrate which
signals are present at the inputs of each multiplexer for
the MAX1407/MAX1408/MAX1409/MAX1414. The
MUXP and MUXN bits of the MUX register choose
which inputs will be seen at the input to the ADC
(Tables 4 and 5) and the signal-detect comparator. See
the MUX Register description under the On-Chip
Registers section for multiplexer functionality.
Input Buffers
The MAX1407/MAX1408/MAX1409/MAX1414 provide
input buffers to isolate the analog inputs from the capaci-
tive load presented by the ADC modulator (Figure 5 and
6). The buffers are chopper stabilized to reduce the effect
of their DC offsets and low-frequency noise. Since the
buffers can represent more than 25% of the total analog
power dissipation (typically 220µA), they may be shut
down in applications where minimum power dissipation is
required and the capacitive input load is not a concern
(see ADC and Power1 Registers). Disable the buffers in
applications where the inputs must operate close to
AGND or above +1.4V. The buffers are individually
enabled or disabled.
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