MAX1300_10 Datasheet, PDF (16/32 Pages) Maxim Integrated Products – 8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 16-Bit ADCs

8- and 4-Channel, ±3 x V_REF Multirange Inputs,
Serial 16-Bit ADCs
CS
SSTRB
SCLK
BYTE 1
BYTE 2
BYTE 3
BYTE 4
DIN
S C2 C1 C0 0 0 0 0
DOUT
ANALOG INPUT
TRACK AND HOLD* _HOLD
tACQ
TRACK
HIGH IMPEDANCE
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
fSAMPLE ≈ fSCLK / 32 + fINTCLK / 17
SAMPLING INSTANT
HOLD
100ns to 400ns
INTCLK**
*TRACK AND HOLD TIMING IS CONTROLLED BY SCLK.
**INTCLK IS AN INTERNAL SIGNAL AND IS NOT ACCESSIBLE TO THE USER.
Figure 3. External Acquisition-Mode Conversion (Mode 1)
fINTCLK ≈ 4.5MHz
Figure 8 illustrates the software-selectable differential
analog input voltage range that produces a valid digital
output. Each analog input differential pair can be inde-
pendently programmed to one of three differential input
ranges by setting the R[2:0] control bits with DIF/SGL = 1.
Regardless of the specified input voltage range and
whether the channel is selected, each analog input is
±16.5V fault tolerant. The analog input fault protection
is active whether the device is unpowered or powered.
Any voltage beyond FSR, but within the ±16.5V fault-
tolerant range, applied to an analog input results in a
full-scale output voltage for that channel.
Clamping diodes with breakdown thresholds in excess
of 16.5V protect the MAX1300/MAX1301 analog inputs
during ESD and other transient events (Figure 6). The
clamping diodes do not conduct during normal device
operation, nor do they limit the current during such
transients. When operating in an environment with the
potential for high-energy voltage and/or current tran-
sients, protect the MAX1300/MAX1301 externally.
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