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MAX1601 Datasheet, PDF (15/16 Pages) Maxim Integrated Products – Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface
Dual-Channel CardBus and PCMCIA
Power Switches with SMBus™ Serial Interface
A
B
C
D
EF
G
tLOW tHIGH
SMBCLK
H
I
J
K
SMBDATA
tSU:STA tHD:STA
tSU:DAT
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
tSU:STO tBUF
I = ACKNOWLEDGE CLOCK PULSE
J = STOP CONDITION
K = NEW START CONDITION
Figure 4. SMBus Read Timing Diagram
The interrupt pointer address provides quick fault iden-
tification for simple slave devices that lack the complex,
expensive logic needed to be a bus master. The host
can read the interrupt pointer to determine which slave
device generated an SMBALERT interrupt signal. The
interrupt pointer address can activate several different
slave devices simultaneously, similar to an I2C general
call. Any slave device that generated an interrupt
attempts to identify itself by putting its own address on
the bus during the first read byte. If more than one slave
attempts to respond, bus arbitration rules apply and the
device with the lower address code wins. The losing
device won’t generate an acknowledge and will contin-
ue to hold the SMBALERT line low until serviced, which
implies that the host interrupt input must be level
sensitive.
__________Applications Information
Changing SMBCLK and SMBDATA
Simultaneously
When clocking data into the MAX1601/MAX1604, SMB-
DATA must not fall before SMBCLK. Otherwise, the
MAX1601/MAX1604 may interpret this as a start condi-
tion. Even when SMBDATA and SMBCLK fall at the
same instant, different fall times for the two signals may
cause the erroneous generation of a start condition. To
ensure that SMBDATA transitions after the falling edge of
SMBCLK, add an RC network to SBMDATA (Figure 6).
1k
VL
0.1µF
MAX1601
+5V
VX MAX1604
Supply Bypassing
Bypass the VY, VX, and 12IN_ inputs with ceramic 0.1µF
capacitors. Bypass the VCC_ and VPP_ outputs with a
0.1µF capacitor for noise reduction and ESD protection.
Power-Up
Apply power to the VL input before any of the switch
inputs. If VX, VY, or 12IN receive power before VL rises
above 2.8V, the supply current may be artificially high
(about 5mA). When the voltage on VL is greater than
2.8V (operating mode), the part consumes its specified
24µA. To avoid power sequencing, diode-OR VX and
VY to VL through a 1kΩ resistor (Figure 5). Take care
not to allow VL to drop below the 2.8V maximum under-
voltage lockout threshold.
VY
Figure 5. Powering from Either VX or VY
+5V
CIRRUS LOGIC
CL-PD6730
SMBDATA
SMBCLK
10k
PULL-UP
1.5k
100pF
SMBDATA
MAX1601
MAX1604
SMBCLK
Figure 6. Application with Cirrus Logic Interface
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