MAX1601 Datasheet, PDF(14/16 Page) Maxim Integrated Products – Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface

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MAX1601 Datasheet, PDF (14/16 Pages) Maxim Integrated Products – Dual-Channel CardBus and PCMCIA Power Switches with SMBus™ Serial Interface

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Dual-Channel CardBus and PCMCIA

Power Switches with SMBusâ¢ Serial Interface

tLOW tHIGH

SMBCLK

SMBDATA

tSU:STA tHD:STA

tSU:DAT

tHD:DAT

tSU:STO tBUF

A = START CONDITION

B = MSB OF ADDRESS CLOCKED INTO SLAVE

C = LSB OF ADDRESS CLOCKED INTO SLAVE

D = R/W BIT CLOCKED INTO SLAVE

E = SLAVE PULLS SMBDATA LINE LOW

F = ACKNOWLEDGE BIT CLOCKED INTO MASTER

G = MSB OF DATA CLOCKED INTO SLAVE (OP/SUS BIT)

H = LSB OF DATA CLOCKED INTO SLAVE

I = SLAVE PULLS SMBDATA LINE LOW

J = ACKNOWLEDGE CLOCKED INTO MASTER

K = ACKNOWLEDGE CLOCK PULSE

L = STOP CONDITION, DATA EXECUTED BY SLAVE

M = NEW START CONDITION

Figure 3. SMBus Write Timing Diagram

SMBus Read Operations

If the IC receives a valid address that includes a read

bit, the IC becomes a slave transmitter. After receiving

the address data, the IC generates an acknowledge

during the acknowledge clock pulse and drives the

SMBDATA line in sync with SMBCLK. The SMB proto-

col requires that the master end the read transmission

by not acknowledging during the acknowledge bit of

SMBCLK. These PC Card ICs support the repeated

start-condition method for changing data-transfer direc-

tion; that is, a write transmission followed by a repeated

start instead of a stop condition prepares the IC for

data reading (Figure 4).

SMBus Interrupts

These PC Card power-switch ICs are slave devices

only, and never initiate communications except by

asserting an interrupt (by pulling SMBALERT low).

Interrupts are generated only for reporting fault condi-

tions, including overcurrent at VCCA, VCCB, VPPA, or

VPPB, undervoltage lockout, and IC thermal overload. If

an interrupt occurs, it can be an indication of impend-

ing system failure. The host system can react by going

into suspend mode or taking other action. It can come

back later to interrogate the IC via the interrupt pointer

to determine status or perform corrective action (such

as disabling the appropriate power switch that might

be connected to a shorted PC card). The fastest

method for turning off the switches in response to a

fault condition is to cycle the voltage on VL in order to

generate a power-on reset (which clears all of the

SMBus registers). Note that the SMBus registers retain

their data even if the main VX/VY supplies are turned

off, provided that VL remains powered.

When a fault occurs, SMBALERT is immediately assert-

ed and latched low. If the fault is momentary and disap-

pears before the IC is serviced, the data is still latched

in the interrupt pointer and SMBALERT remains assert-

ed. Normally, the master (host system or PCMCIA digi-

tal controller) now sends out the interrupt pointer

address (00011000) followed by a read bit. SMBALERT

is cleared and the PC Card IC responds by putting out

its address on the bus. If the fault persists, SMBALERT

is re-asserted, but the data in the fault registers is not

reloaded. The data in the fault latches only reflects the

first time SMBALERT is asserted.

When the part enters operating mode, a false interrupt

flag may be issued. The user needs to send the inter-

rupt address to clear the false interrupt.

Normally, the master sends out the appropriate PC Card

switch address on the bus, followed by a read bit. The

data in the fault registers is then clocked out onto the

bus (which also clears the fault registers). If the fault

persists, the fault bits and SMBALERT are latched

again.

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