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MAX15035 Datasheet, PDF (13/27 Pages) Maxim Integrated Products – 15A Step-Down Regulator with Internal Switches
15A Step-Down Regulator with Internal Switches
Standard Application Circuit
The MAX15035 standard application circuit (Figure 1)
generates a 1.5V or 1.05V output rail for general-purpose
use. See Table 1 for component selections. Table 2 lists
the component suppliers.
Detailed Description
The MAX15035 step-down controller is ideal for low-
duty-cycle (high-input voltage to low-output voltage)
applications. Maxim’s proprietary Quick-PWM pulse-
width modulator in the MAX15035 is specifically
designed for handling fast-load steps while maintaining
a relatively constant operating frequency and inductor
operating point over a wide range of input voltages.
The Quick-PWM architecture circumvents the poor
load-transient timing problems of fixed-frequency, cur-
rent-mode PWMs while also avoiding the problems
caused by widely varying switching frequencies in con-
ventional constant-on-time (regardless of input voltage)
pulse-frequency modulation (PFM) control schemes.
+5V Bias Supply (VCC/VDD)
The MAX15035 requires an external 5V bias supply in
addition to the input. See Figure 6 for an optional 5V
bias generation circuit.
The 5V bias supply powers both the PWM controller
and internal gate-drive power, so the maximum current
drawn is determined by:
IBIAS = IQ + fSWQG = 2mA to 20mA (typ)
The MAX15035 includes a 20Ω resistor between VDD
and VCC, simplifying the PCB layout requirement.
Free-Running Constant-On-Time PWM
Controller with Input Feed-Forward
The Quick-PWM control architecture is a pseudo-fixed-
frequency, constant on-time, current-mode regulator
with voltage feed-forward (Figure 2). This architecture
relies on the output filter capacitor’s ESR to act as a
current-sense resistor, so the output ripple voltage pro-
vides the PWM ramp signal. The control algorithm is
simple: the high-side switch on-time is determined sole-
ly by a one-shot whose pulse width is inversely propor-
tional to input voltage and directly proportional to
output voltage. Another one-shot sets a minimum off-
time (200ns typ). The on-time one-shot is triggered if
the error comparator is low, the low-side switch current
is below the valley current-limit threshold, and the mini-
mum off-time one-shot has timed out.
On-Time One-Shot
The heart of the PWM core is the one-shot that sets the
high-side switch on-time. This fast, low-jitter, adjustable
one-shot includes circuitry that varies the on-time in
response to input and output voltage. The high-side
switch on-time is inversely proportional to the input volt-
age as sensed by the TON input, and proportional to
the feedback voltage as sensed by the FB input:
On-Time (tON) = tSW (VFB/VIN)
where tSW (switching period) is set by the resistance
(RTON) between TON and IN. This algorithm results in a
nearly constant switching frequency despite the lack of
a fixed-frequency clock generator. Connect a resistor
(RTON) between TON and IN to set the switching period
tSW = 1/fSW:
( ) tSW
= CTON
RTON + 6.5kΩ
⎛ VFB ⎞
⎝⎜ VOUT ⎠⎟
where CTON = 16.26pF. When used with unity-gain feed-
back (VOUT = VFB), a 96.75kΩ to 303.25kΩ corresponds
to switching periods of 167ns (600kHz) to 500ns
(200kHz), respectively. High-frequency (600kHz) opera-
tion optimizes the application for the smallest compo-
nent size, trading off efficiency due to higher switching
losses. This may be acceptable in ultra-portable devices
where the load currents are lower and the controller is
powered from a lower voltage supply. Low-frequency
(200kHz) operation offers the best overall efficiency at
the expense of component size and board space.
For continuous conduction operation, the actual switching
frequency can be estimated by:
fSW
=
VFB + VDIS
tON(VIN − VCHG)
where VDIS is the sum of the parasitic voltage drops in
the inductor discharge path, including synchronous recti-
fier, inductor, and PCB resistances; VCHG is the sum of
the resistances in the charging path, including the high-
side switch, inductor, and PCB resistances; and tON is
the on-time calculated by the MAX15035.
Power-Up Sequence (POR, UVLO)
The MAX15035 is enabled when EN is driven high and
the 5V bias supply (VDD) is present. The reference
powers up first. Once the reference exceeds its UVLO
threshold, the internal analog blocks are turned on and
masked by a 50µs one-shot delay in order to allow the
bias circuitry and analog blocks enough time to settle
to their proper states. With the control circuitry reliably
powered up, the PWM controller may begin switching.
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