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MAX16063 Datasheet, PDF (12/13 Pages) Maxim Integrated Products – 1% Accurate, Low-Voltage, Quad Window Voltage Detector
1% Accurate, Low-Voltage,
Quad Window Voltage Detector
Margin Output Disable (MARGIN)
MARGIN allows system-level testing while power sup-
plies are adjusted from their nominal voltages. Drive
MARGIN low to deassert all outputs (UVOUT_,
OVOUT_, and RESET) regardless of the voltage at any
monitored input. The state of each output does not
change while MARGIN = GND. While MARGIN is low,
the IC continues to monitor all voltages. When MARGIN
is deasserted, the outputs go to their monitored states
after a short propagation delay. The MARGIN input is
internally pulled up to VCC. Leave unconnected or con-
nect to VCC if unused.
Undervoltage Lockout (UVLO)
The MAX16063 features a VCC undervoltage lockout
(UVLO) that preserves a reset status even if VCC falls as
low as 1V. The undervoltage lockout circuitry monitors
the voltage at VCC. If VCC falls below the UVLO falling
threshold (typically 1.735V), RESET is asserted and all
detector outputs are asserted low. This eliminates an
incorrect RESET or detector output state as VCC drops
below the normal VCC operational voltage range of
1.98V to 5.5V.
During power-up as VCC rises above 1V, RESET is assert-
ed and all detector outputs are asserted low until VCC
exceeds the UVLO threshold. As VCC exceeds the UVLO
threshold, all inputs are monitored and the correct output
state appears at all the outputs. This also ensures that
RESET and all detector outputs are in the correct state
once VCC reaches the normal VCC operational range.
Power-Supply Bypassing
In noisy applications, bypass VCC to ground with a
0.1µF capacitor as close to the device as possible. In
addition, the additional capacitor improves transient
immunity. For fast-rising VCC transients, additional
capacitance may be required.
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