MAX14770E_13 Datasheet, PDF (12/16 Pages) Maxim Integrated Products – High-ESD Profibus RS-485 Transceiver

MAX14770E
High-ESD Profibus RS-485 Transceiver
Detailed Description
The MAX14770E is a half-duplex, Q35kV high ESD-
protected transceiver for PROFIBUS-DP, RS-485, and
RS-422 communications. The device features true fail-
safe circuitry that guarantees a logic-high receiver
output when the receiver inputs are open or shorted,
or when they are connected to a terminated transmis-
sion line with all drivers disabled (see the True Fail-Safe
section). The MAX14770E supports data rates up to
20Mbps.
The MAX14770E operates from a single +4.5V to +5.5V
supply. Drivers are output short-circuit current limit-
ed. Thermal-shutdown circuitry protects drivers against
excessive power dissipation. When activated, the ther-
mal-shutdown circuitry places the driver outputs into
a high-impedance state. The MAX14770E has a hot-
swap input structure that prevents disturbances on the
differential signal lines when the MAX14770E is powered
up (see the Hot-Swap Capability section).
True Fail-Safe
The MAX14770E guarantees a logic-high receiver output
when the receiver inputs are shorted or open, or when
they are connected to a terminated transmission line with
all drivers disabled. This is done by having the receiver
Table 1. Functional Table (Transmitting)
TRANSMITTING
INPUTS
OUTPUTS
RE
DE
DI
B
A
X
1
1
0
1
X
1
0
1
0
0
0
X
High-Z
High-Z
1
0
X
High-Z and shutdown
X = Don’t care.
Table 2. Functional Table (Receiving)
RECEIVING
INPUTS
RE
DE
A-B
0
X
R -0.05V
0
X
P -0.2V
0
X
Open/shorted
1
1
X
OUTPUT
RO
1
0
1
High-Z
1
0
X
High-Z and
shutdown
X = Don’t care.
12  
threshold between -50mV and -200mV. If the differential
receiver input voltage (A - B) is greater than or equal to
-50mV, RO is logic-high. If (A - B) is less than or equal to
-200mV, RO is logic-low. In the case of a terminated bus
with all transmitters disabled, the receiver’s differential
input voltage is pulled to 0V by the termination. With
the receiver thresholds of the MAX14770E, this results
in a logic-high with a 50mV minimum noise margin. The
-50mV to -200mV threshold complies with the Q200mV
EIA/TIA-485 standard.
Hot-Swap Capability
Hot-Swap Inputs
When circuit boards are inserted into a hot or powered
backplane, disturbances to the enable inputs and differ-
ential receiver inputs can lead to data errors. Upon initial
circuit board insertion, the processor undergoes its pow-
er-up sequence. During this period, the processor out-
put drivers are high impedance and are unable to drive
the DE and RE inputs of the MAX14770E to a defined
logic level. Leakage currents up to 10FA from the high-
impedance output of a controller could cause DE and RE
to drift to an incorrect logic state. Additionally, parasitic
circuit board capacitance could cause coupling of VCC
or GND to DE and RE. These factors could improperly
enable the driver or receiver. However, the MAX14770E
has hot-swap inputs that avoid these potential problems.
When VCC rises, an internal pulldown circuit holds DE
low and RE high. After the initial power-up sequence,
the pulldown circuit becomes transparent, resetting the
hot-swap-tolerable inputs.
Hot-Swap Input Circuitry
The MAX14770E DE and RE enable inputs feature
hot-swap capability. At the input, there are two NMOS
devices, M1 and M2 (Figure 11). When VCC ramps from
0, an internal 15Fs timer turns on M2 and sets the SR
latch that also turns on M1. Transistors M2, a 1mA cur-
rent sink, and M1, a 100FA current sink, pull DE to GND
through a 5.6kI resistor. M2 is designed to pull DE to
the disabled state against an external parasitic capaci-
tance up to 100pF that can drive DE high. After 15Fs, the
timer deactivates M2 while M1 remains on, holding DE
low against three-state leakages that can drive DE high.
M1 remains on until an external source overcomes the
required input current. At this time, the SR latch resets
and M1 turns off. When M1 turns off, DE reverts to a
standard, high-impedance CMOS input. Whenever VCC
drops below 1V, the hot-swap input is reset.
For RE, there is a complementary circuit employing two
PMOS devices pulling RE to VCC.
Maxim Integrated