DS1682 Datasheet, PDF (12/14 Pages) Dallas Semiconductor – Total Elapsed Time Recorder with Alarm

DS1682
Total-Elapsed-Time Recorder
with Alarm
Depending upon the state of the R/W bit, two types of
data transfer are possible:
Data transfer from a master transmitter to a slave
receiver. The first byte transmitted by the master is the
slave address. Next follows a number of data bytes. The
slave returns an acknowledge bit after each received
byte.
Data transfer from a slave transmitter to a master
receiver. The master transmits the first byte (the slave
address). The slave then returns an acknowledge bit. Next
follows a number of data bytes transmitted by the slave to
the master. The master returns an acknowledge bit after
all received bytes other than the last byte. A “not acknowl-
edge” is returned at the end of the last received byte.
The master device generates all of the serial clock pulses
and the START and STOP conditions. A transfer is ended
with a STOP condition or with a repeated START condi-
tion. Since a repeated START condition is also the begin-
ning of the next serial transfer, the bus is not released.
Slave Receiver Mode (Write Mode): Serial data and
clock are received through SDA and SCL. After each byte
is received, the receiver transmits an acknowledge bit.
START and STOP conditions are recognized as the begin-
ning and end of a serial transfer. The slave address byte is
the first byte received after the master generates a START
condition. The address byte contains the 7-bit DS1682
address, which is 1101011 (D6h), followed by the direction
bit (R/W). The second byte from the master is the register
address. This sets the register pointer. The master then
transmits each byte of data, with the DS1682 acknowledg-
ing each byte received. The register pointer increments
after each byte is written. The master generates a STOP
condition to terminate the data write (Figure 7).
Slave Transmitter Mode (Read Mode): The first byte
is received and handled as in the slave receiver mode.
However, in this mode, the direction bit indicates that the
transfer direction is reversed. Serial data is transmitted on
SDA by the DS1682 while the serial clock is input on SCL.
The slave address byte is the first byte received after the
master generates a START condition. The address byte
contains the 7-bit DS1682 address, followed by the direc-
tion bit (R/W). After receiving a valid slave address byte
and direction bit, the DS1682 generates an acknowledge
on the SDA line. The DS1682 begins to transmit data on
each SCL pulse starting with the register address pointed
to by the register pointer. As the master reads each byte,
it must generate an acknowledge. The register pointer
increments after each byte is read. The DS1682 must
receive a “not acknowledge” on the last byte to end a
read (Figure 8).
SLAVE
ADDRESS
R/W
REGISTER
ADDRESS
DATA (n)
DATA (n + 1)
DATA (n + x)
S
1101011
0A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
P
S – START
A – ACKNOWLEDGE
P – STOP
R/W – READ/WRITE OR DIRECTION BIT
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
Figure 7. Data Write—Slave Receiver Mode
SLAVE
ADDRESS
R/W
DATA (n)
DATA (n + 1)
DATA (n + 2)
DATA (n + x)
S
1101011
1A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
/A
S – START
A – ACKNOWLEDGE
P – STOP
/A – NOT ACKNOWLEDGE
R/W – READ/WRITE OR DIRECTION BIT
Figure 8. Data Read—Slave Transmitter Mode
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
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