MAX11212_12 Datasheet, PDF (11/14 Pages) Maxim Integrated Products – 18-Bit, Single-Channel, Ultra-Low Power, Delta-Sigma ADC with 2-Wire Serial Interface

MAX11212
18-Bit, Single-Channel, Ultra-Low Power, Delta-
Sigma ADC with 2-Wire Serial Interface
SCLK
1
2
3
RDY/DOUT
CONVERSION IS DONE
DATA IS AVAILABLE
D17
D16
CALIBRATION STARTS ON 26TH SCLK
24
25
26
1
2
25TH SCLK PULLS
RDY/DOUT HIGH
0
D17 D16
CONVERSION IS DONE
DATA IS AVAILABLE AFTER CALIBRATION
t₈
Figure 3. Timing Diagram for Data Read Followed by Two Extra Clock Cycles for Self-Calibration
SCLK
RDY/DOUT
CONVERSION IS DONE
DATA IS AVAILABLE
1
2
3
t9
t10
D17
D16
DEVICE ENTERS
SLEEP MODE
DEVICE EXITS OUT
SLEEP MODE
24
SLEEP
MODE
1
2
0
D17
D16
CONVERSION IS DONE
DATA IS AVAILABLE
t11
Figure 4. Timing Diagram for Data Read Followed by Sleep Mode Activation; Single-Conversion Timing
Data Read Followed by Sleep Mode
The MAX11212 can be put into sleep mode to save
power between conversions. To activate the sleep mode,
idle the SCLK high any time after the RDY/DOUT output
goes low (that is, after conversion data is available). It is
not required to read out all 18 bits before putting the part
in sleep mode. Sleep mode is activated after the SCLK
is held high (see Figure 4). The RDY/DOUT output is
pulled high once the device enters sleep mode. To come
out of sleep mode, pull SCLK low. After the sleep mode
is deactivated (when the device wakes up), conversion
starts again and RDY/DOUT goes low, indicating the
next conversion data is available. See Figure 4.
Single-Conversion Mode
For operating the MAX11212 in single-conversion mode,
activate and deactivate sleep mode between conver-
sions as described in the Data Read Followed by Sleep
Mode section). Single-conversion mode reduces power
consumption by shutting down the device when idle
between conversions. See Figure 4.
Single-Conversion Mode with
Maxim Integrated
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