MAX1077 Datasheet, PDF (11/18 Pages) Maxim Integrated Products – 1.5Msps, Single-Supply, Low-Power, True-Differential, 10-Bit ADCs with Internal Reference

1.5Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
Applications Information
Internal Reference
The MAX1077/MAX1079 have an on-chip voltage refer-
ence trimmed to 2.048V. The internal reference output
is connected to REF and also drives the internal capac-
itive DAC. The output can be used as a reference volt-
age source for other components and can source up to
2mA. Bypass REF with a 0.01µF capacitor and a 4.7µF
capacitor to RGND.
The internal reference is continuously powered up dur-
ing both normal and partial power-down modes. In full
power-down mode, the internal reference is disabled.
Be sure to allow at least 2ms recovery time after hard-
ware power-up or exiting full power-down mode for the
reference to reach its intended value.
How to Start a Conversion
An analog-to-digital conversion is initiated by CNVST
and clocked by SCLK, and the resulting data is clocked
out on DOUT by SCLK. With SCLK idling high or low, a
falling edge on CNVST begins a conversion. This causes
the analog input stage to transition from track to hold
mode and DOUT to transition from high impedance to
being actively driven low. A total of 16 SCLK cycles are
required to complete a normal conversion. If CNVST is
low during the 16th falling SCLK edge, DOUT returns to
high impedance on the next rising edge of CNVST or
SCLK, enabling the serial interface to be shared by multi-
ple devices. If CNVST returns high after the 14th, but
before the 16th SCLK rising edge, DOUT remains active
so continuous conversions can be sustained. The high-
est throughput is achieved when performing continuous
conversions. Figure 10 illustrates a conversion using a
typical serial interface.
Connection to
Standard Interfaces
The MAX1077/MAX1079 serial interface is fully compati-
ble with SPI/QSPI and MICROWIRE (see Figure 11). If a
serial interface is available, set the CPU’s serial interface
in master mode so the CPU generates the serial clock.
Choose a clock frequency up to 24MHz.
SPI and MICROWIRE
When using SPI or MICROWIRE, the MAX1077/MAX1079
are compatible with all four modes programmed with the
CPHA and CPOL bits in the SPI or MICROWIRE control
register. Conversion begins with a CNVST falling edge.
DOUT goes low, indicating a conversion is in progress.
Two consecutive 1-byte reads are required to get the full
10 bits from the ADC. DOUT transitions on SCLK rising
edges. DOUT is guaranteed to be valid t_DOUT later and
OUTPUT CODE
111...111
111...110
111...101
FULL-SCALE
TRANSITION
000...011
000...010
000...001
000...000
012 3
FS = V_REF
ZS = 0
1 LSB = ^VREF
1024
DIFFERENTIAL INPUT
VOLTAGE (LSB)
FS
FS - 3/2 LSB
Figure 8. Unipolar Transfer Function (MAX1077 Only)
OUTPUT CODE
011...111
011...110
000...010
000...001
000...000
111...111
111...110
111...101
FS = ^VREF
2
ZS = 0
- FS = ^-VREF
2
1 LSB = ^VREF
1024
FULL-SCALE
TRANSITION
100...001
100...000
-FS
0
FS
DIFFERENTIAL INPUT
FS - 3/2 LSB
VOLTAGE (LSB)
Figure 9. Bipolar Transfer Function (MAX1079 Only)
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