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MAX13256 Datasheet, PDF (10/17 Pages) Maxim Integrated Products – 36V H-Bridge Transformer Driver for Isolated Supplies Integrated System Protection
MAX13256
36V H-Bridge Transformer
Driver for Isolated Supplies
N:1 CT
+
VIN
-
+
VOUT = 1/(2 x N) x VIN - VD
-
VD = DIODE FORWARD VOLTAGE
FIGURE 3A. PUSH-PULL RECTIFICATION
N:1
+
VIN
-
+
VOUT = 2(VIN/N - VD)
-
FIGURE 3B. VOLTAGE DOUBLER
N:1
+
VIN
-
+
VOUT = VIN/N - 2VD
-
FIGURE 3C. FULL-WAVE RECTIFIER
Figure 3. Secondary-Side Rectification Topologies
ST1
ST2
R
R
91I
91I
C
330pF
C
330pF
Figure 4. Output Snubber
L
FILTER
25µH
OUTPUT
C
2.2µF
Applications Information
Snubber
For VDD greater than 27V, use a simple RC snubber
circuit on ST1 and ST2 to ensure that the peak voltage is
less than 40V during switching (Figure 4). Recommended
values for the snubber are R = 91I and C = 330pF.
Power Dissipation
The power dissipation of the device is approximated by:
PD = (ROHL x IPRI2) + (IDD x VDD)
where ROHL is the combined high-side and low-side on-
resistance of the internal FET drivers, and IPRI is the load
current flowing through ST1 and ST2.
High-Temperature Operation
When the MAX13256 is operated under high ambient
temperatures, the power dissipated in the package can
raise the junction temperature close to thermal shutdown.
Under such temperature conditions, the power dissipa-
tion should be held low enough so that that junction tem-
perature observes a factor of safety margin. The maximum
junction temperature should be held below +140°C. Use
the package’s thermal resistances to calculate the junc-
tion temperature. Alternatively use the Maximum Output
Current vs. Temperature curves shown in the Typical
Operating Characteristics section to determine the maxi-
mum ST1/ST2 load currents.
Hot Insertion
If the MAX13256 is inserted into a live backplane, it is
possible to damage the device. Damage is caused by
overshoot on VDD exceeding the absolute maximum
rating. Limit the transient input voltage to the MAX13256
with an external protection device.
Output-Ripple Filtering
Output-voltage ripple can be reduced with a lowpass LC
filter (see Figure 5). The component values shown give a
cutoff frequency of 21.5kHz by the equation:
f3dB
=
2π
1
LC
Use an inductor with low DC resistance and sufficient sat-
uration current rating to minimize filter power dissipation.
Power-Supply Decoupling
Bypass VDD to ground with a 1FF ceramic capacitor as
close as possible to the device.
Figure 5. Output Ripple Filtering
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