DS1374_10 Datasheet, PDF (10/18 Pages) Maxim Integrated Products – I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output

I²C, 32-Bit Binary Counter Watchdog RTC with
Trickle Charger and Reset Input/Output
Power Control
The power-control function is provided by a precise,
temperature-compensated voltage reference and a
comparator circuit that monitors the V_CC level. The
device is fully accessible and data can be written and
read when V_CC is greater than V_PF. However, when
V_CC falls below V_PF, the internal clock registers are
blocked from any access. If V_PF is less than V_BACKUP,
the device power is switched from V_CC to V_BACKUP
when V_CC drops below V_PF. If V_PF is greater than
V_BACKUP, the device power is switched from V_CC to
V_BACKUP when V_CC drops below V_BACKUP. The regis-
ters are maintained from the V_BACKUP source until V_CC
is returned to nominal levels (Table 1). After V_CC
returns above V_PF, read and write access is allowed
after RST goes high (Figure 1).
Table 2. Power Control
SUPPLY CONDITION
V_CC < V_PF, V_CC < V_BACKPUP
V_CC < V_PF, V_CC > V_BACKUP
V_CC > V_PF, V_CC < V_BACKUP
V_CC > V_PF, V_CC > V_BACKUP
READ/WRITE
ACCESS
No
No
Yes
Yes
POWERED
BY
V_BACKUP
V_CC
V_CC
V_CC
Address Map
Table 3 shows the address map for the DS1374 regis-
ters. During a multibyte access, the address pointer
wraps around to location 00h when it reaches the end of
the register space (08h). On an I²C START, STOP, or
address pointer incrementing to location 00h, the current
time is transferred to a second set of registers. These
secondary registers read the time information, while the
clock continues to run. This eliminates the need to reread
the registers in case of an update of the main registers
during a read.
Time-of-Day Counter
The time-of-day counter is a 32-bit up counter that
increments once per second when the oscillator is run-
ning. The contents can be read or written by accessing
the address range 00h–03h. When the counter is read,
the current time of day is latched into a register, which
is output on the serial data line while the counter contin-
ues to increment.
Note: Writing to any TOD register will reset the 1Hz
square wave output.
Table 3. Address Map
ADDRESS BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
00H
TOD Counter Byte 0
01H
TOD Counter Byte 1
02H
TOD Counter Byte 2
03H
TOD Counter Byte 3
04H
WD/ALM Counter Byte 0
05H
WD/ALM Counter Byte 1
06H
WD/ALM Counter Byte 2
07H
EOSC WACE WD/ALM BBSQW WDSTR RS2
RS1
AIE
08H
OSF
0
0
0
0
0
0
AF
09H
TCS3
TCS2
TCS1
TCS0
DS1
DS0 ROUT1 ROUT0
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied.
FUNCTION
Time-of-Day Counter
Time-of-Day Counter
Time-of-Day Counter
Time-of-Day Counter
Watchdog/Alarm Counter
Watchdog/Alarm Counter
Watchdog/Alarm Counter
Control
Status
Trickle Charger
10 ____________________________________________________________________