DS1337_09 Datasheet, PDF (10/16 Pages) Maxim Integrated Products – I2C Serial Real-Time Clock

DS1337 I²C Serial Real-Time Clock
Table 3. Alarm Mask Bits
DY/DT
X
X
X
X
ALARM 1 REGISTER MASK BITS
(BIT 7)
A1M4
A1M3
A1M2
A1M1
1
1
1
1
1
1
1
0
1
1
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
ALARM RATE
Alarm once per second
Alarm when seconds match
Alarm when minutes and seconds match
Alarm when hours, minutes, and seconds match
Alarm when date, hours, minutes, and seconds
match
Alarm when day, hours, minutes, and seconds match
DY/DT
X
X
X
0
1
ALARM 2 REGISTER MASK BITS
(BIT 7)
A2M4
A2M3
A2M2
1
1
1
1
1
0
1
0
0
0
0
0
0
0
0
ALARM RATE
Alarm once per minute (00 seconds of every minute)
Alarm when minutes match
Alarm when hours and minutes match
Alarm when date, hours, and minutes match
Alarm when day, hours, and minutes match
SPECIAL-PURPOSE REGISTERS
The DS1337 has two additional registers (control and status) that control the RTC, alarms, and square-wave
output.
Control Register (0Eh)
Bit 7
EOSC
Bit 6
0
Bit 5
0
Bit 4
RS2
Bit 3
RS1
Bit 2
INTCN
Bit 1
A2IE
Bit 0
A1IE
Bit 7: Enable Oscillator (EOSC). This active-low bit when set to logic 0 starts the oscillator. When this bit is set to
logic 1, the oscillator is stopped. This bit is enabled (logic 0) when power is first applied.
Bits 4 and 3: Rate Select (RS2 and RS1). These bits control the frequency of the square-wave output when the
square wave has been enabled. The table below shows the square-wave frequencies that can be selected with the
RS bits. These bits are both set to logic 1 (32kHz) when power is first applied.
SQW/INTB Output
INTCN RS2 RS1
0
0
0
0
0
1
0
1
0
0
1
1
1
X
X
SQW/INTB
OUTPUT
1Hz
4.096kHz
8.192kHz
32.768kHz
A2F
A2IE
X
X
X
X
1
Bit 2: Interrupt Control (INTCN). This bit controls the relationship between the two alarms and the interrupt output
pins. When the INTCN bit is set to logic 1, a match between the timekeeping registers and the alarm 1 registers l
activates the INTA pin (provided that the alarm is enabled) and a match between the timekeeping registers and the
alarm 2 registers activates the SQW/INTB pin (provided that the alarm is enabled). When the INTCN bit is set to
logic 0, a square wave is output on the SQW/INTB pin. This bit is set to logic 0 when power is first applied.
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