88F6180_1 Datasheet, PDF (88/112 Pages) –

88F6180
Hardware Specifications
8.6.10 Serial Peripheral Interface (SPI) AC Timing
8.6.10.1 SPI (Master Mode) AC Timing Table
Table 51: SPI (Master Mode) AC Timing Table
De s cr iption
SCLK clock frequency
SCLK high time
SCLK low time
SCLK slew rate
Data out valid relative to SCLK falling edge
CS active before SCLK rising edge
CS not active after SCLK rising edge
Data in setup time relative to SCLK rising edge
Data in hold time relative to SCLK rising edge
Sym bol
f CK
tCH
tCL
tSR
tDOV
tCSB
tCSA
tSU
tHD
SPI
Min Max
See Note 3
0.46
-
0.46
-
0.5
-
-2.5
2.5
8.0
-
8.0
-
0.2
-
5.0
-
Units
MHz
tCK
tCK
V/ns
ns
ns
ns
tCK
ns
Note s
3
1
1
1
1
1
1
2
2
Note s :
General comment: All values w ere measured from 0.3*vddio to 0.7*vddio, unless otherw ise specified.
General comment: tCK = 1/fCK.
1. For all signals, the load is CL = 10 pF.
2. Def ined f rom vddio/2 to vddio/2.
3. See "Reference Clocks" table for more details.
8.6.10.2
SPI (Master Mode) Test Circuit
Figure 28: SPI (Master Mode) Test Circuit
Test Point
CL
Doc. No. MV-S104988-U0 Rev. E
Page 88
Document Classification: Proprietary Information
Copyright © 2008 Marvell
December 2, 2008, Preliminary