28330-DSH-002-A_15 Datasheet, PDF (47/101 Pages) M/A-COM Technology Solutions, Inc. – DS3/E3 Framer with 52 Mbps HDLC Controller

CN8330
DS3/E3 Framer with 52 Mbps HDLC Controller
2.0 Functional Description
2.4 Receiver Operation
2.4.4 Framing Operation
In DS3 mode, a parallel search framing circuit is used to recover the subframe and
M-frame alignments in the DS3 signal. Framing is initiated by an Out-of-Frame
(OOF) condition as determined by the receiver frame bit check circuitry. When 3
out of 16 consecutive subframing (F) bits are in error or when 2 out of 3
consecutive M-frames have M bit errors, an OOF condition is declared. Average
reframe time is less than 1 msec.
In E3 mode, a serial search for the 10-bit FAS pattern (1111 0100 00) is
conducted. When three consecutive correct patterns are found, the receiver is
declared to be in frame. An OOF condition is declared when four consecutive
incorrect FAS patterns are detected. Average reframe time is less than 250 µsec.
In either mode, serial data continues to be present on RXDAT and RXMSY
and will continue to indicate the old framing position until the OOF condition
clears. RXMSY will indicate the new framing position when the OOF condition
is cleared.
2.4.5 Alarm Detection
The CN8330 receiver contains status indicators to obtain alarm information for
link maintenance.
Alarm Indication Signal Detect [AISDet;SR00.2] in the DS3/E3 Maintenance
Status Register [SR00;0x10] is updated each M-frame interval. It is set if AIS was
detected in the previous M-frame. An AIS condition is present when there is valid
framing and parity, both X-bits are equal, all C-bits are zero, and the payload bits
are 1010... starting with 10 after each overhead bit. This signal can be integrated
by the controller to declare a received AIS. In E3 mode, an unframed all-ones
signal is detected as AIS.
Idle Code Detect [IdleDet;SR00.4] is updated each M-frame interval. It is set
if the idle code condition was detected in the previous M-frame. The idle code
condition is present when there is valid framing and parity, both X-bits are equal,
all C-bits in subframe 3 are zero, and the payload bits are 1100... starting with 11
after each overhead bit. No idle code is defined for E3 signals; therefore, IdleDet
will indicate zero in E3 mode.
Yellow Alarm Detect [YelDet;SR00.3] is updated each M-frame interval and is
an active high indication that both X-bits in the previous M-frame were low. This
indication will not be set if the X-bits are in disagreement or if both X-bits are
high. In E3 mode, YelDet will be set if the A-bit is high.
Loss-of-Signal Alarm [LOSAlm;SR00.0] is set as soon as 175 ± 75
consecutive zeros (prior to B3ZS/HDB3 decoding) are received. This alarm
condition is set as soon as the condition is detected. The indication is cleared
when a one's density of more than 33 percent (25 percent for E3) is achieved for
175 ± 75 clock cycles. Note that in some systems, a loss-of-signal alarm is not
cleared until the receiver is in frame. This function can be performed by the
controller.
100441E
Conexant
2-25