M21050_17 Datasheet, PDF (32/70 Pages) M/A-COM Technology Solutions, Inc. – Duplex Quad (Octal) Multi-Rate CDR (1.0 Gbps - 3.2 Gbps)

M21050 Data Sheet
2.1.8
Input Hysteresis
Table 2-8. Input Hysteresis (Input_hys: Address 08h)
Bits
Type
Default
Label
7:6
R/W
5
R/W
00b
Reserved
0b
en_hys
4:0
R/W
00000b Reserved
Description
N/A
When enabled, 25 mV of hysteresis will be applied to all inputs. Useful
in preventing noise from toggling inputs during quiescent periods of
input patterns, such as seen in the InfiniBand polling pattern.
0b: Disable input hysteresis
1b: Enable input hysteresis
N/A
2.1.9
Built In Self-Test (BIST) Receiver Channel Select
Table 2-9. Receiver Channel Select (BISTrx_chsel: Address 10h)
Bits
Type
Default
Label
3
R/W
2:0
R/W
0b
000b
Reserved
chan
Description
N/A
Selects which CDR to route into the BIST receiver (active when
BISTrx_ctrl [1]=1)
000b: Output A0 to BIST
001b: Output A1 to BIST
010b: Output A2 to BIST
011b: Output A3 to BIST
100b: Output B0 to BIST
101b: Output B1 to BIST
110b: Output B2 to BIST
111b: Output B3 to BIST
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