M02013_15 Datasheet, PDF (20/21 Pages) M/A-COM Technology Solutions, Inc. – CMOS Transimpedance Amplifier with AGC for Fiber-optic Networks up to 3.2 Gbps

M02013
CMOS Transimpedance Amplifier with AGC
for Fiber-optic Networks up to 3.2 Gbps
Rev V8
5.0 Die Specification
Figure 5-1. Bare Die Information
Notes:
Process technology: CMOS, Silicon Nitride
passivation
Die thickness: 300 µm
Pad metallization: Aluminium
Die size: 1090 µm x 880 µm
Pad opening (except PINA): 86 µm across flat sides
PINA pad: 70 µm across flat sides (70 µm x 70 µm)
Pad Centers in µm referenced to center of device
Connect backside bias to ground
Pad
Number
Pad
X
Y
1
AGC
-329
-76
2 ⁽¹⁾
V_CC
-329
-228
3
PINK
-124
-434
4
PINA
124
-434
5 ⁽¹⁾
V_CC
329
-228
6
MON
329
-76
7
DOUT
329
76
8 ⁽¹⁾
DOUTGND
329
228
9c ^{(1, 2) GND}
329
360
9b ^{(1, 2) GND}
255
434
9a ^{(1, 2) GND}
124
434
10a ^{(1, 2) GND}
-124
434
10b ^{(1, 2) GND}
-255
434
10c ^{(1, 2) GND}
-329
360
11 ^{(1) DOUTGND}
-329
228
12
DOUT
-329
76
NOTES:
1. It is only necessary to bond one V_CC pad and one
GND pad. However, bonding one of each pad (if
available) on each side of the die is encouraged for
improved performance in noisy environments.
2. Each location is an acceptable bonding location.
20
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