M02013_15 Datasheet, PDF (12/21 Pages) M/A-COM Technology Solutions, Inc. – CMOS Transimpedance Amplifier with AGC for Fiber-optic Networks up to 3.2 Gbps

M02013
CMOS Transimpedance Amplifier with AGC
for Fiber-optic Networks up to 3.2 Gbps
Rev V8
3.2
General Description
3.2.1
TIA (Transimpedance Amplifier)
The transimpedance amplifier consists of a high gain single-ended CMOS amplifier (TIA), with a feedback resistor.
The feedback creates a virtual earth low impedance at the input and virtually all of the input current passes through
the feedback resistor, defining the voltage at the output. Advanced CMOS design techniques are employed to
maintain the stability of this stage across all input conditions.
Single-ended amplifiers have inherently poor power supply noise rejection. For this reason, an on-chip low dropout
linear regulator has been incorporated into the design to give excellent noise rejection up to several MHz. Higher
frequency power supply noise is removed by the external 470 pF decoupling capacitor connected to PINK.
The circuit is designed for PIN photodiodes in the “grounded cathode” configuration, with the anode connected to
the input of the TIA and the cathode connected to AC ground, such as the provided PINK terminal. Reverse DC
bias is applied to reduce the photodiode capacitance. Avalanche photodiodes can be connected externally to a
higher voltage.
3.2.2
AGC
The M02013 has been designed to operate over the input range of +3 dBm to -23 dBm @ 3.2 Gbps and -24 dBm
@ 2.5 Gbps. This represents a ratio of 1:300, whereas the acceptable dynamic range of the output is only 1:30
which implies a compression of 10:1 in the transimpedance. The design uses a MOS transistor operating as a
“voltage controlled resistor” to achieve the transimpedance variation.
Another feature of the AGC is that it only operates on signals greater than –17.5 dBm (@ 0.9 A/W). This knee in
the gain response is important when setting “signal detect” functions in the following post amplifier. It also aids in
active photodiode alignment.
The AGC pad allows the AGC to be disabled during photodiode alignment by grounding the pad through a low
impedance. The AGC control voltage can be monitored during normal operation at this pad by a high impedance
(>10 MΩ) circuit.
3.2.3
Output Stage
The signal from the TIA enters a phase splitter followed by a DC-shift stage and a pair of voltage follower outputs.
These are designed to drive a differential (100 Ω) load. They are stable for driving capacitive loads, such as
interstage filters. Each output has its own GND pad, all four GND pads on the chip should be connected for proper
operation. Since the M02013 exhibits rapid roll-off (3 pole), simple external filtering is sufficient.
3.2.4
Monitor O/P
High impedance output sinks a replica average photodiode current for photo-alignment and monitoring purposes.
This output is compatible with the DDMI Receive Power Specification (SFF-8472) and MACOM’s DDMI controller
products. Ensure that the voltage on V_MON is in the range of 1V to V_CC. Refer to Figure 4-1.
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