XB1005-BD_15 Datasheet, PDF (12/14 Pages) M/A-COM Technology Solutions, Inc. – Buffer Amplifier

XB1005-BD
Buffer Amplifier
35.0-45.0 GHz
Rev. V1
App Note [1] Biasing - As shown in the bonding diagram, this device can be operated with all three stages in
parallel, and can be biased for low noise performance or high power performance. Low noise bias is nominally
Vd=3.5V, Id=50mA. More controlled performance will be obtained by separately biasing Vd1, Vd2 and Vd3 each
at 3.5V, with Id1=9mA, Id2=16mA, Id3=25mA. Power bias may be as high as Vd=4.5V, Id=154mA with all
stages in parallel, or most controlled performance will be obtained by separately biasing Vd1, Vd2 and Vd3 each
at 4.5V, with Id1=28mA, Id2=42mA, Id3=84mA. It is also recommended to use active biasing to keep the cur-
rents constant as the RF power and temperature vary; this gives the most reproducible results. Depending on
the supply voltage available and the power dissipation constraints, the bias circuit may be a single transistor or a
low power operational amplifier, with a low value resistor in series with the drain supply used to sense the cur-
rent. The gate of the pHEMT is controlled to maintain correct drain current and thus drain voltage. The typical
gate voltage needed to do this is -0.4V. Typically the gate is protected with Silicon diodes to limit the applied
voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is available before apply-
ing the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the
drain or gate pad DC bypass capacitors (~100-200 pf) can be combined. Additional DC bypass capacitance
(~0.01 uF) is also recommended to all DC or combination (if gate or drains are tied together) of DC bias pads.
For Individual Stage Bias (Recommended for Saturated Applications) -- Each DC pad (Vd1,2,3 and Vg1,2,3)
needs to have DC bypass capacitance (~100-200 pf) as close to the device as possible. Additional DC bypass
capacitance (~0.01 uF) is also recommended.
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