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XB1004-BD Datasheet, PDF (10/12 Pages) Mimix Broadband – 16.0-30.0 GHz GaAs MMIC Buffer Amplifier
XB1004-BD
Buffer Amplifier
16.0-30.0 GHz
Rev. V1
App Note [1] Biasing - As shown in the bonding diagram, this device can be operated with all three stages in
parallel, and can be biased for low noise performance or high power performance. Low noise bias is nominally
Vd=4V, Id=90mA. More controlled performance will be obtained by separately biasing Vd1 and Vd2 each at
4.0V, 45mA. Power bias may be as high as Vd=6.0V, Id=180mA with all stages in parallel, or most controlled
performance will be obtained by separately biasing Vd1 and Vd2 each at 6.0V, 90mA. It is also recommended to
use active biasing to keep the currents constant as the RF power and temperature vary; this gives the most re-
producible results. Depending on the supply voltage available and the power dissipation constraints, the bias
circuit may be a single transistor or a low power operational amplifier, with a low value resistor in series with the
drain supply used to sense the current. The gate of the pHEMT is controlled to maintain correct drain current
and thus drain voltage. The typical gate voltage needed to do this is -0.3V. Typically the gate is protected with
Silicon diodes to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative
gate bias is available before applying the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the
drain or gate pad DC bypass capacitors (~100-200 pf) can be combined. The suggested configuration is to con-
nect Vd1,2 and Vg1c,2c. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or combi-
nation (if gate or drains are tied together) of DC bias pads.
For Individual Stage Bias (Low Input Drive applications only) -- Each DC pad (Vd1,2 and Vg1a,2a,2b) needs to
have DC bypass capacitance (~100-200 pf) as close to the device as possible. Additional DC bypass capaci-
tance (~0.01 uF) is also recommended.
For Individual Stage Bias (High Input Drive applications only) -- Each DC pad (Vd1,2 and Vg1c,2c) needs to
have DC bypass capacitance (~100-200 pf) as close to the device as possible. Additional DC bypass capaci-
tance (~0.01 uF) is also recommended.
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