S2083 Datasheet, PDF (1/14 Pages) M/A-COM Technology Solutions, Inc. – Surface Mount Instructions for QFN / DFN Packages

Application Note
S2083
Surface Mount Instructions for QFN / DFN Packages
Rev. V10
Introduction
The layout of the surface mount board plays a
critical role in product design and must be done
properly to achieve the intended performance of an
integrated circuit. An accurate PCB pad and solder
stencil design provides a proper connection
interface between the IC package and the board.
With the correct pad geometry, the package will
self-align when subjected to a solder reflow
process and will also allow for just enough excess
surface area for adequate solder filleting. The
solder mask should be applied over bare copper
(SMOBC) to avoid solder reflow under the solder
mask.
Via Design
To improve the thermal/RF performance of the
package, we recommend providing thermal vias on
the PCB. These vias provide a heat transfer and
RF ground path from the top surface of the PCB to
the inner layers and the bottom surface. We
recommend a via diameter of 0.3 mm in a 1.0 mm
pitch array for standard square packages. This is
shown in Figure 1-1, in which the vias are 1.0 mm
away from their diagonal neighbors. Other non-
standard designs may require a slightly different via
diameter and pitch as shown in Figures 1-2, 1-3,
and 2-4.
These considerations apply in general for most of
M/A-COM Tech’s surface mount packaged IC’s.
This application note provides specific guidelines
for mounting quad flat no-leads packages (QFN per
JEDEC MO-220), and dual flat no-leads packages
(DFN per JEDEC MO-229).
Figure 1-1 PCB Land Design
PCB Pad Design
The first consideration in mounting the QFN / DFN
to a board is the layout of metalized pads. The US-
based trade association, IPC, has developed land
pad design standards contained in the document
IPC-SM-782 entitled Surface Mount Design and
Land Pattern Standards.
Figures 1-1 through 1-3 shows the PCB geometry
developed for M/A-COM’s QFN / DFN packages
based on the general guidelines contained within
IPC-SM-782. The center area or the thermal pad,
acts as an RF ground pad and thermal path to
conduct heat away from the package. Normally,
the size of the thermal pad should match the size
of the exposed pad on the bottom of the package.
However, a smaller thermal pad is sometimes
recommended to prevent solder bridging to the
lead pads. Table 1 shows some suggested PCB
pad dimensions for QFN / DFN packages used by
M/A-COM Tech. The solderable length of the lead
pad is controlled by the solder mask opening (Lm)
as indicated in Table 2, in combination with pad
length (L) as indicated in Table 1.
1
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