28973-DSH-001-A Datasheet, PDF (1/119 Pages) M/A-COM Technology Solutions, Inc. – Single-Chip SDSL/HDSL Transceiver

Preliminary Information
This document contains information on a product under development. The parametric information
contains target parameters that are subject to change.
RS8973
Single-Chip SDSL/HDSL Transceiver
The RS8973 is a full-duplex 2B1Q transceiver based on Conexant’s HDSL technology, Distinguishing Features
with a built-in frequency synthesizer to support variable rate SDSL applications. It offers _{• Supports data rates ranging from}
2320 kbps operation, low power consumption, and pin-for-pin compatibility with
144 kbps to 2320 kbps
Bt8970 and Bt8960.
• Integrated frequency synthesizer
The RS8973 is a highly integrated device that includes all of the active circuitry
• Meets ETSI TS 101 135 (formerly
needed for a complete 2B1Q transceiver. In the receive portion of the device, a variable ^{ETR 152) pulse template, output}
gain amplifier optimizes the signal level according to the dynamic range of the
analog-to-digital converter. Once the signal is digitized, sophisticated adaptive echo
cancellation, equalization, and detection DSP algorithms reproduce the originally
power and PSD specifications at 784,
1168 and 2320 kbps data rates,
using the same external support
circuit
transmitted far-end signal.
• Meets ANSI T1/E1.4/94-006 pulse
In the transmitter, the transmit source and scrambler operation are programmable
template, output power and PSD
through the microcomputer interface. A highly linear digital-to-analog converter with
specifications at 784 kbps.
programmable gain sets the transmission power for optimal performance. A pulse
• Pin-for-pin and software compatible
shaping filter and a low-distortion line driver generate the signal characteristics needed ^{with Bt8970 and Bt8960}
to drive a large range of subscriber lines at low distortion.
• Supports automatic rate adaptation
The integrated frequency synthesizer is ideal for variable rate SDSL applications. The ^{• Single-chip 2B1Q transceiver}
RS8973 can be programmed to operate at data rates ranging from 144 kbps to
2320 kbps, using a single crystal as a reference clock source.
solution
• Low power consumption (under
685 mW at 784 kbps operation)
The RS8973 is fully compliant with standards for HDSL 2B1Q transmission. Key to _{• Glueless interface to Motorola and}
variable rate applications, it can meet the PSD, output power, and pulse shape
Intel processors
requirements, as specified in ETSI TS 101 135 (formerly ETR 152) with the same
• Flexible monitoring and control
support circuit. Therefore, a single design using the RS8973 can be configured through _{• Backwards compatible with Bt8952,}
a simple software command to operate at either 784, 1168, or 2320 kbps and will still
Bt8960, and Bt8970 software API
meet these ETSI requirements. No hardware changes are required.
commands
Startup and performance monitoring operations are controlled through the
microprocessor interface. C-language source code supporting these operations is
supplied under a no-fee license agreement from Conexant. The RS8973 includes a
glueless interface to both Intel and Motorola microprocessors.
• ZipStartup™ available for faster link
establishment
• RS8953B companion SDSL/HDSL
framers available
• JTAG/IEEE Std 1149.1 compliant
Functional Block Diagram
• 100-pin PQFP package
• –40 °C to +85 °C operation
Analog
Receive
Variable
Gain
Amplifier
Analog-
to-Digital
Converter
Digital
Signal
Processor
MPU
Bus
Analog
Transmit
Microcomputer
Interface
Clock
Synthesizer
Line
Driver
Pulse
Shaping
Filter
Program-
mable
Gain
DAC
Framer/
Channel
Unit
Interface
Recovered
Data and
Clock
Transmit
Data
Applications
• Variable rate data access systems
• Data access concentrators
• E1 and T1 HDSL transport
• Internet connectivity
• Voice and/or data Pair Gain systems
• N × 64 data transport
• ISDN BRI concentrators
• Cellular base station data links
• Campus modems
Data Sheet
Preliminary Information
N8973DSD
June 15, 1999