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LTC6992-1 Datasheet, PDF (9/32 Pages) Linear Technology – TimerBlox Voltage-Controlled Pulse Width Modulator (PWM)
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
TYPICAL PERFORMANCE CHARACTERISTICS V+ = 3.3V, RSET = 200k, and TA = 25°C, unless
otherwise noted.
Duty Cycle Error vs DIVCODE
5
VMOD/ VSET = 0.2 (12.5%)
4 3 PARTS
3
2
1
0
–1
–2
–3
–4
–5
0 2 4 6 8 10 12 14
DIVCODE
6992 G26
Duty Cycle Error vs DIVCODE
5
VMOD/ VSET = 0.5 (50%)
4 3 PARTS
3
2
1
0
–1
–2
–3
–4
–5
0 2 4 6 8 10 12 14
DIVCODE
6992 G27
Duty Cycle Error vs DIVCODE
5
VMOD/ VSET = 0.8 (87.5%)
4 3 PARTS
3
2
1
0
–1
–2
–3
–4
–5
0 2 4 6 8 10 12 14
DIVCODE
6992 G28
NDIV = 1 Duty Cycle vs VMOD/ VSET
100
DIVCODE = 0
90 3 PARTS
LTC6992-1/
LTC6992-4
80
LTC6992-2/
70
LTC6992-3
60
50
40
LTC6992-2/
30 LTC6992-4
20
10
0
0
LTC6992-1/LTC6992-3
0.2 0.4 0.6 0.8
1
VMOD/VSET (V/V)
6992 G29
NDIV > 1 Duty Cycle vs VMOD/ VSET
100
DIVCODE = 4
90 3 PARTS
LTC6992-1/
LTC6992-4
80
LTC6992-2/
70
LTC6992-3
60
50
40
LTC6992-2/
30 LTC6992-4
20
10
0
0
LTC6992-1/LTC6992-3
0.2 0.4 0.6 0.8
1
VMOD/VSET (V/V)
6992 G30
NDIV > 1 Duty Cycle vs VMOD/ VSET
100
LTC6992-1/LTC6992-3
90
80
70 LTC6992-2/
LTC6992-4
60
50
40
LTC6992-2/
30
LTC6992-3
20
10 DIVCODE = 11
LTC6992-1/
3 PARTS
0
LTC6992-4
0
0.2 0.4 0.6
VMOD/VSET (V/V)
0.8
1
6992 G31
NDIV = 1 Duty Cycle Error vs Ideal
5
DIVCODE = 0
4 3 PARTS
3
2
1
PART C
PART B
0
–1
PART A
–2
–3
–4
–5
0
25
50
75
IDEAL DUTY CYCLE (%)
100
6992 G32
NDIV > 1 Duty Cycle Error vs Ideal
5
DIVCODE = 4
4 3 PARTS
3
2
1
PART B
PART C
0
–1
–2
PART A
–3
–4
–5
0
25
50
75
IDEAL DUTY CYCLE (%)
100
6992 G33
NDIV > 1 Duty Cycle Error vs Ideal
5
DIVCODE = 11
4 3 PARTS
3
PART A
2
PART C
1
0
PART B
–1
–2
–3
–4
–5
0
25
50
75 100
IDEAL DUTY CYCLE (%)
6992 G34
69921234p
9