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LTC3901_15 Datasheet, PDF (9/16 Pages) Linear Technology – Secondary Side Synchronous Driver for Push-Pull and Full-Bridge Converters
LTC3901
APPLICATIO S I FOR ATIO
output goes high; this is to avoid any ringing immediately
after the MOSFETs are switched on.
Under no/light load conditions, if the inductor average
current is less than half of its peak-to-peak ripple current,
the inductor current will reverse into MOSFETs during a
portion of the free-wheeling period, forcing CSX+ to rise
above CSX–. The current sense comparator input thresh-
old is set at 10.5mV to prevent tripping under this normal
no load condition. If at no load, the product of the inductor
negative peak current and MOSFET RDS(ON) is higher than
10.5mV; this may trip the comparator and force the
LTC3901 to operate in discontinuous mode. Figure 7
shows the LTC3901 operating in discontinuous mode; the
driver’s output goes low before the next SYNC transition
edge when the inductor current goes negative. In push-
pull topology, both MOSFETs conduct the same amount of
current during the free-wheeling period; this will trip both
comparators at the same time. Discontinuous mode is
sometimes undesirable because if the load current sud-
SDRA
SDRB
SYNC
0V
ME
MF
L1
CURRENT
0V
CURRENT SENSE
COMPARATOR TRIP
Figure 7a. Discontinuous Mode Operation at No Load
SYNC
0V
ME
MF
L1
CURRENT
0V
ADJUSTED CURRENT SENSE THRESHOLD 3901 F06
Figure 7b. Continuous Mode Operation
with Adjusted Current Sense Threshold
denly increases when the MOSFETs are off, it creates a
large output voltage drop. To overcome this, add a resistor
divider, RCSX1 and RCSX2 at the CSX+ pin to increase the
10.5mV threshold so that the LTC3901 operates in con-
tinuous mode at no load.
The LTC3901 CSX+ pin has an internal current sinking
clamp circuit (ZCSX) that clamps the pin to around 11V.
The clamp circuit, together with the external series resis-
tor RCSX1, protects the CSX+ pins from the high MOSFET
drain voltage in the power delivery cycle. During the power
delivery cycle, one of the MOSFETs (ME or MF) is off. The
drain voltage of the MOSFET that is off is determined by the
primary input voltage and the transformer turn ratio. This
voltage can be high and may damage the internal circuit if
CSX+ is connected directly to the drain of its MOSFET. The
current sinking capability of the clamp circuit is 5mA
minimum.
The value of the resistorsRCSX1, RCSX2 and RCSX3 should
be calculated using the following formulas to meet both
the clamp and threshold voltage requirements:
k = {48 • IRIPPLE • RDS(ON)} –1
RCSX2 = {200 • VIN(MAX) • NS/NP –2200 • (1 + k)} /k
RCSX1 = k • RCSX2
RCSX3 = {RCSX1 • RCSX2} / {RCSX1 + RCSX2}
If k = 0 or less than zero, RCSX2 is not needed and RCSX1
= RCSX3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA
where:
IRIPPLE = Inductor peak-to-peak ripple current
RDS(ON) = On-resistance of MOSFET at IRIPPLE/2
VIN(MAX) = Primary side main supply maximum input
voltage
NS/NP = Power transformer T1, turn ratio
If the LTC3901 still operates in discontinuous mode with
the calculated resistance value, increase the value of
RCSX1 to raise the threshold. The resistors RCSX1 and
RCSX2 and the CSX+ pins input capacitance plus the PCB
trace capacitance forms an R-C delay; this slows down the
response time of the comparators. The resistors and CSX+
input leakage currents also create an input offset error.
To minimize this delay and error, do not use resistance
value higher than required and make the PCB trace from
3901f
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