LTC3901_15 Datasheet, PDF (10/16 Pages) Linear Technology – Secondary Side Synchronous Driver for Push-Pull and Full-Bridge Converters

LTC3901
APPLICATIO S I FOR ATIO
the resistors to the LTC3901 CSX⁺/CSX^– pins as short as
possible . Add a series resistor, R_CSX3, with value equal to
parallel sum of R_CSX1 and R_CSX2 to the CSX^– pin and
connect the other end of R_CSX3 directly to the source of the
MOSFET.
SYNC Input
Figure 8 shows the external circuit for the LTC3901 SYNC
input. The gate drive transformer (T2) should be selected
based on the primary switching frequency and SDRA/
SDRB output voltage.
The values of the C_SG and R_SYNC should then be adjusted
to obtain a optimum SYNC pulse shape and amplitude. The
amplitude of the SYNC pulse should be much higher than
the LTC3901 SYNC threshold of ±1.4V. Amplitudes greater
than ±5V will help to speed up the SYNC comparator and
reduce the propagation delay from SYNC to the drivers.
When SDRA and SDRB lines go low, the resulting under-
shoot or overshoot must not exceed the minimum SYNC
threshold of ±1V.
C_SG
0.1µF
T2
SDRB
PRIMARY
CONTROLLER
SDRA
R_SG
220Ω
LTC3901
SYNC
R_SYNC
4.7k
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Figure 8. SYNC Input Circuit
V_CC/PV_CC Regulator
The V_CC/PV_CC supply for the LTC3901 can be generated by
peak rectifying the transformer secondary winding as
shown in Figure 9. The Zener diode D_Z sets the output
voltage (V_Z – 0.7V). Resistor R_B (on the order of a few
hundred ohms), in series with the base of Q_REG, may be
required to surpress high frequency oscillations depend-
ing on Q_REG’s selection. A power MOSFET can also be used
by increasing the zener diode value to offset the drop of the
gate-to-source voltage. The V_CC input is separated from
the PV_CC input through a 100Ω resistor. This lowers the
driver switching feedthrough. Connect a 1µF bypass ca-
pacitor for the V_CC supply. PV_CC supply current varies
linearly with the supply voltage, driver load and clock
frequency. A 4.7µF bypass capacitor for the PV_CC supply
is sufficient for most applications. Alternatively, the
LTC3901 can be powered directly by V_OUT if the voltage is
10
T1
SECONDARY
WINDING
D3
MBR0540
0.1µF
R_Z
2k
R_B
OPTIONAL
6V
D_Z
C_PVCC
4.7µF
Q_REG
FZT690B
R_VCC
100Ω
Figure 9. V_CC/PV_CC Regulator
PV_CC
V_CC
C_VCC
1µF
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higher than 4.5V. This reduces the number of external
components needed.
The LTC3901 has an UVLO detector that pulls the drivers’
output low if V_CC < 4.1V. The output remains off from
V_CC = 1V to 4.1V. The UVLO detector has 0.5V of hyster-
esis to prevent chattering.
In a typical push-pull converter, the secondary side cir-
cuits have no power until the primary side controller starts
operating. Since power for the LTC3901 is derived from
the power transformer T1, the LTC3901 will initially re-
main off. During this period (V_CC < 4.1V), the synchronous
MOSFETs ME and MF will remain off and the MOSFETs’
body diodes will conduct. The MOSFETs may experience
very high power dissipation due to a high voltage drop in
the body diodes. To prevent MOSFET damage, a V_CC
voltage greater than 4.1V should be provided quickly. The
V_CC supply circuit in Figure 9 will provide power for the
LTC3901 within the first few switching pulses of the
primary controller, preventing overheating of the MOSFETs.
Full-Bridge Converter Application
The LTC3901 can be used in full-bridge converter applica-
tions. Figure 10 shows a simplified full-bridge converter
circuit. The LTC3901 circuit and operation is the same as
in the push-pull application (refer to Figure 1). On the pri-
mary side there are four power MOSFETs, MA to MD, driven
by the respective outputs of the primary controller. Trans-
former T3 and T4 step up the gate drives for MA and MC.
Each full cycle of the full-bridge converter includes four
distinct periods which are similar to those found in the
push-pull application. Figure 11 shows the full-bridge
converter switching waveforms. The shaded areas corre-
spond to power delivery periods.
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