LTC3411 Datasheet, PDF (9/20 Pages) Linear Technology – 1.25A, 4MHz, Synchronous Step-Down DC/DC Converter

LTC3411
APPLICATIO S I FOR ATIO
typical surface mount inductors that work well in LTC3411
applications.
Table 1. Representative Surface Mount Inductors
MANU-
FACTURER PART NUMBER
MAX DC
VALUE CURRENT DCR HEIGHT
Toko
A914BYW-2R2M-D52LC 2.2µH 2.05A 49mΩ 2mm
Toko
A915AY-2ROM-D53LC 2µH 3.3A 22mΩ 3mm
Coilcraft D01608C-222
2.2µH 2.3A 70mΩ 3mm
Coilcraft LP01704-222M
2.2µH 2.4A 120mΩ 1mm
Sumida CDRH4D282R2
2.2µH 2.04A 23mΩ 3mm
Sumida CDC5D232R2
2.2µH 2.16A 30mΩ 2.5mm
Taiyo Yuden N06DB2R2M
2.2µH 3.2A 29mΩ 3.2mm
Taiyo Yuden N05DB2R2M
2.2µH 2.9A 32mΩ 2.8mm
Murata LQN6C2R2M04
2.2µH 3.2A 24mΩ 5mm
Catch Diode Selection
Although unnecessary in most applications, a small im-
provement in efficiency can be obtained in a few applica-
tions by including the optional diode D1 shown in Figure␣ 5,
which conducts when the synchronous switch is off.
When using Burst Mode operation or pulse skip mode, the
synchronous switch is turned off at a low current and the
remaining current will be carried by the optional diode. It
is important to adequately specify the diode peak current
and average power dissipation so as not to exceed the
diode ratings. The main problem with Schottky diodes is
that their parasitic capacitance reduces the efficiency,
usually negating the possible benefits for LTC3411 cir-
cuits. Another problem that a Schottky diode can intro-
duce is higher leakage current at high temperatures, which
could reduce the low current efficiency.
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Considerations) to avoid
ringing and increased dissipation when using a catch
diode.
Input Capacitor (C_IN) Selection
In continuous mode, the input current of the converter is
a square wave with a duty cycle of approximately V_OUT/
V_IN. To prevent large voltage transients, a low equivalent
series resistance (ESR) input capacitor sized for the maxi-
mum RMS current must be used. The maximum RMS
capacitor current is given by:
I_RMS ≈ I_MAX
V_OUT (V_IN − V_OUT )
V_IN
where the maximum average output current I_MAX equals
the peak current minus half the peak-to-peak ripple cur-
rent, I_MAX = I_LIM – ∆I_L/2.
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS = I_OUT/2. This simple worst case is commonly used
to design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours life-
time. This makes it advisable to further derate the capaci-
tor, or choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled to
meet the size or height requirements of the design. An
additional 0.1µF to 1µF ceramic capacitor is also recom-
mended on V_IN for high frequency decoupling, when not
using an all ceramic capacitor solution.
Output Capacitor (C_OUT) Selection
The selection of C_OUT is driven by the required ESR to
minimize voltage ripple and load step transients. Typically,
once the ESR requirement is satisfied, the capacitance is
adequate for filtering. The output ripple (∆V_OUT) is deter-
mined by:
∆V_OUT
≈

∆I_{L }ESR
+
1
8f_O C_OUT


where f = operating frequency, C_OUT = output capacitance
and ∆I_L = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆I_L increases
with input voltage. With ∆I_L = 0.3 • I_LIM the output ripple
will be less than 100mV at maximum V_IN and f_O = 1MHz
with:
ESRC_OUT < 150mΩ
sn3411 3411fs
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