LTC3860_15 Datasheet, PDF(8/36 Page) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Current Sharing

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LTC3860_15 Datasheet, PDF (8/36 Pages) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Current Sharing

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LTC3860

PIN FUNCTIONS

VCC (Pin 1): Chip Supply Voltage. Bypass this pin to GND

with a capacitor (0.1Î¼F to 1Î¼F ceramic) in close proximity

to the chip.

FB1 (Pin 2), FB2 (Pin 8): Error Ampliï¬er Inverting Inputs.

FB1 or FB2 can be connected to VSNSOUT via a resistor

divider for remote VOUT sensing. The bottom of the divider

should be connected to the SGND pin of the IC. The other

FB, when used, is typically connected to the other VOUT via

a resistor divider, also terminated at the IC SGND pin.

COMP1 (Pin 3), COMP2 (Pin 7): Error Ampliï¬er Outputs.

PWM duty cycle increases with this control voltage.

The error ampliï¬ers in the LTC3860 are true operational

ampliï¬ers with low output impedance. As a result, the

outputs of two active error ampliï¬ers cannot be directly

connected together! For multiphase operation, connecting

the FB pin on an error ampliï¬er to VCC will three-state

the output of that ampliï¬er. Multiphase operation can

then be achieved by connecting all of the COMP pins

together and using one channel as the master and all

others as slaves.

VSNSOUT (Pin 4): Differential Ampliï¬er Output.

VSNSN (Pin 5): Remote Sense Differential Ampliï¬er

Inverting Input. Connect this pin to sense ground at the

output load.

VSNSP (Pin 6): Remote Sense Differential Ampliï¬er

Noninverting Input. Connect this pin to VOUT at the output

load.

FREQ (Pin 10): Frequency Set/Select Pin. If CLKIN is high,

the resistor between this pin and SGND sets the switching

frequency. If CLKIN is low, the logic state of this pin sets

frequency. This pin sources 21Î¼A.

CLKIN (Pin 11): External Clock Synchronization Input

Pin. If an external clock is present at this pin, the switch-

ing frequency will be synchronized to the external clock.

Otherwise, if high, a resistor from FREQ to SGND sets

frequency; if low, FREQ state sets frequency.

CLKOUT (Pin 12): Clock Output Pin. Used to synchronize

other LTC3860s.

PHSMD (Pin 13): Phase Mode Pin. Selects Ch1-Ch2 and

Ch1-CLKOUT phase relationship.

ISNS1N (Pin 21), ISNS2N (Pin 20): Current Sense Am-

pliï¬er (â) Input. The (â) input to the current ampliï¬er is

normally connected to the respective VOUT.

ISNS1P (Pin 22), ISNS2P (Pin 19): Current Sense Ampliï¬er

(+) Input. The (+) input to the current sense ampliï¬er is

normally connected to the midpoint of the inductorâs parallel

RC sense circuit or to the node between the inductor and

sense resistor if using a discrete sense resistor.

ILIM1 (Pin 23), ILIM2 (Pin 18): Current Comparator Sense

Voltage Limit Selection Pin. Connect a resistor from this

pin to SGND. This pin sources 20Î¼A. The resultant voltage

sets the threshold for overcurrent protection.

RUN1 (Pin 24), RUN2 (Pin 17): Run Control Inputs. A

voltage above 2.25V on either pin turns on the IC. How-

ever, forcing either of these pins below 2V causes the IC

to shut down that particular channel. There are 1.5Î¼A

pull-up currents for these pins.

PWM1 (Pin 25), PWM2 (Pin 16): (Top) Gate Signal Out-

put. This signal goes to the PWM or top gate input of the

external gate driver or integrated driver MOSFET. This is

a three-state compatible output.

PWMEN1/PWMEN2 (Pin 26/Pin 15): Enable Pin for Non-

Three-State compatible drivers. This pin has an internal

open-drain pull-up to VCC. An external resistor to SGND

is required. This pin is low when the corresponding PWM

pin is high impedance.

PGOOD1 (Pin 27), PGOOD2 (Pin 14): Power Good Pins.

Open-drain outputs that pull to ground when output volt-

age is not in regulation.

IAVG (Pin 28): Average Current Output Pin. A capacitor tied

to ground from this pin stores a voltage proportional to

the masterâs instantaneous average current when multiple

outputs are paralleled. Tie the IAVG pin to ground when the

controller drives two independent outputs.

SGND (Pins 29, 30, Exposed Pad Pin 33): Ground. Pins

29, 30 and 33 are electrically connected internally. The

exposed pad must be soldered to the PCB for rated thermal

performance.

VINSNS (Pin 31): VIN Sense Pin. Connects to the VIN

power supply to provide line feedforward compensation.

3860fc

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