LTC3860_15 Datasheet, PDF (12/36 Pages) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Current Sharing

LTC3860
OPERATION (Refer to Functional Diagram)
Certain applications can result in the start-up of the
converter into a non-zero load voltage, where residual
charge is stored on the output capacitor at the onset of
converter switching. In order to prevent the output from
discharging under these conditions, the bottom MOSFET
is disabled until soft-start is complete. However, the bot-
tom MOSFET will be turned on for 20ns every 8 cycles
to allow the driver IC to recharge its topside gate drive
capacitor.
Soft-Start and Tracking Using TRACK/SS Pin
The user can connect an external capacitor greater than
10nF to the TRACK/SS pin for the relevant channel to
increase the soft-start ramp time beyond the internally set
default. The TRACK/SS pin represents a noninverting input
to the error amplifier and behaves identically to the internal
ramp described in the previous section. An internal 2.5μA
current source charges the capacitor, creating a voltage
ramp on the TRACK/SS pin. As the TRACK/SS pin voltage
rises from 0V to 0.6V, the output voltage rises smoothly
from 0V to its final value in:
C_SS • 0.6V _seconds
2.5µA
Alternatively, the TRACK/SS pin can be used to force the
start-up of V_OUT to track the voltage of another supply.
Typically this requires connecting the TRACK/SS pin to
an external divider from the other supply to ground (see
Applications Information). It is only possible to track
another supply that is slower than the internal soft-start
ramp. The TRACK/SS pin also has an internal open-drain
NMOS pull-down transistor that turns on to reset the
TRACK/SS voltage when the channel is shut down (RUN
= 0V or V_CC < UVLO threshold) or during an OC fault
condition.
In multiphase operation, one master error amplifier is
used to control all of the PWM comparators. The FB pins
for the unused error amplifiers are connected to V_CC in
order to three-state these amplifier outputs, and the COMP
pins are connected together. The TRACK/SS pins should
also be connected together so that the slave phases can
detect when soft-start is complete and enable the bottom
MOSFET.
12
Frequency Selection and the Phase-Locked Loop (PLL)
The selection of the switching frequency is a trade-off
between efficiency, transient response and component
size. High frequency operation reduces the size of the
inductor and output capacitor as well as increasing the
maximum practical control loop bandwidth. However,
efficiency is generally lower due to increased transition
and switching losses.
The LTC3860’s switching frequency can be set in three
ways: using an external resistor to linearly program the
frequency, synchronizing to an external clock, or simply
selecting one of two fixed frequencies (400kHz and
600kHz). Table 1 highlights these modes.
Table 1. Frequency Selection
CLKIN PIN
FREQ PIN
Clocked
High
Low
R_FREQ to GND
R_FREQ to GND
Low
Low
High
FREQUENCY
250kHz to 1.25MHz
250kHz to 1.25MHz
400kHz
600kHz
No external PLL filter is required to synchronize the
LTC3860 to an external clock. Applying an external clock
signal to the CLKIN pin will automatically enable the PLL
with internal filter.
Constant frequency operation brings with it a number of
benefits: inductor and capacitor values can be chosen
for a precise operating frequency and the feedback loop
can be similarly tightly specified. Noise generated by the
circuit will always be at known frequencies.
Using the CLKOUT and PHSMD Pins in
Multiphase Applications
The LTC3860 features CLKOUT and PHSMD pins that al-
low multiple LTC3860 ICs to be daisychained together in
multiphase applications. The clock output signal on the
CLKOUT pin can be used to synchronize additional ICs in
a 3-, 4-, 6- or 12-phase power supply solution feeding a
single high current output, or even several outputs from
the same input supply.
The PHSMD pin is used to adjust the phase relationship
between channel 1 and channel 2, as well as the phase
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