LTC3860_15 Datasheet, PDF (27/36 Pages) Linear Technology – Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Current Sharing

LTC3860
APPLICATIONS INFORMATION
To set the output voltage equal to 1.2V:
R_B = 10k
The Renesas R2J20602NP integrated-driver MOSFET is
chosen for the power stages because of its high efficiency
and high level of integration.
Printed Circuit Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the converter.
1. The connection between the SGND pin on the LTC3860
and all of the small-signal components surrounding the
IC should be isolated from the system power ground.
Place all decoupling capacitors, such as the ones on
V_CC, between ISNSP and ISNSN etc., close to the IC. In
multiphase operation SGND should be Kelvin-connected
to the main ground node near the bottom terminal of
the input capacitor. In dual-channel operation, SGND
should be Kelvin-connected to the bottom terminal of
the output capacitor for channel 2, and channel 1 should
be remotely sensed using the remote sense differential
amplifier.
2. Place the small-signal components away from high
frequency switching nodes on the board. The LTC3860
contains remote sensing of output voltage and inductor
current and logic-level PWM outputs enabling the IC to
be isolated from the power stage.
3. The PCB traces for remote voltage and current sense
should avoid any high frequency switching nodes in
the circuit and should ideally be shielded by ground
planes. Each pair (V_SNSP and V_SNSN, I_SNSP and
I_SNSN) should be routed parallel to one another with
minimum spacing between them. If DCR sensing is
used, place the top resistor (Figure 6b, R1) close to
the switching node.
4. The input capacitor should be kept as close as possible
to the power MOSFETs. The loop from the input capaci-
tor’s positive terminal, through the MOSFETs and back
to the input capacitor’s negative terminal should also
be as small as possible.
5. If using discrete drivers and MOSFETs, check the
stress on the MOSFETs by independently measuring
the drain-to-source voltages directly across the device
terminals. Beware of inductive ringing that could exceed
the maximum voltage rating of the MOSFET. If this
ringing cannot be avoided and exceeds the maximum
rating of the device, choose a higher voltage rated
MOSFET.
6. When cascading multiple LTC3860 ICs, minimize
the capacitive load on the CLKOUT pin to minimize
phase error. Kelvin all the LTC3860 IC grounds to the
same point, typically SGND of the IC containing the
master.
3860fc
27