LTC3857 Datasheet, PDF (8/38 Pages) Linear Technology – Low IQ, Dual, 2-Phase Synchronous Step-Down Controller

LTC3857
Pin Functions
SENSE1^–, SENSE2^– (Pin 1, Pin 9): The (–) Input to the
Differential Current Comparators. When greater than
INTV_CC – 0.5V, the SENSE^– pin supplies current to the
current comparator.
FREQ (Pin 2): The frequency control pin for the internal
VCO. Connecting the pin to GND forces the VCO to a fixed
low frequency of 350kHz. Connecting the pin to INTV_CC
forces the VCO to a fixed high frequency of 535kHz.
Other frequencies between 50kHz and 900kHz can be
programmed using a resistor between FREQ and GND.
An internal 20µA pull-up current develops the voltage to
be used by the VCO to control the frequency
PHASMD (Pin 3): Control Input to Phase Selector which
determines the phase relationships between control-
ler 1, controller 2 and the CLKOUT signal. Pulling this
pin to ground forces TG2 and CLKOUT to be out of phase
180° and 60° with respect to TG1. Connecting this pin to
INTV_CC forces TG2 and CLKOUT to be out of phase 240°
and 120° with respect to TG1. Floating this pin forces TG2
and CLKOUT to be out of phase 180° and 90° with respect
to TG1. Refer to Table 1.
CLKOUT (Pin 4): Output clock signal available to daisy-
chain other controller ICs for additional MOSFET driver
stages/phases. The output levels swing from INTV_CC to
ground.
PLLIN/MODE (Pin 5): External Synchronization Input to
Phase Detector and Forced Continuous Mode Input. When
an external clock is applied to this pin, the phase-locked
loop will force the rising TG1 signal to be synchronized
with the rising edge of the external clock. When not
synchronizing to an external clock, this input, which acts
on both controllers, determines how the LTC3857 operates
at light loads. Pulling this pin to ground selects Burst
Mode operation. An internal 100k resistor to ground also
invokes Burst Mode operation when the pin is floated.
Tying this pin to INTV_CC forces continuous inductor current
operation. Tying this pin to a voltage greater than 1.2V and
less than INTV_CC – 1.3V selects pulse-skipping operation.
This can be done by adding a 100k resistor between the
PLLIN/MODE pin and INTV_CC.
SGND (Pin 6, Exposed Pad Pin 33): Small-signal ground
common to both controllers, must be routed separately
from high current grounds to the common (–) terminals
of the C_IN capacitors. The exposed pad must be soldered
to the PCB for rated thermal performance.
RUN1, RUN2 (Pin 7, Pin 8): Digital Run Control Inputs for
Each Controller. Forcing either of these pins below 1.26V
shuts down that controller. Forcing both of these pins below
0.7V shuts down the entire LTC3857, reducing quiescent
current to approximately 8µA. Do not float these pins.
INTV_CC (Pin 19): Output of the Internal Linear Low Dropout
Regulator. The driver and control circuits are powered
from this voltage source. Must be decoupled to power
ground with a minimum of 4.7µF ceramic or other low
ESR capacitor. Do not use the INTV_CC pin for any other
purpose.
EXTV_CC (Pin 20): External Power Input to an Internal LDO
Connected to INTV_CC. This LDO supplies INTV_CC power,
bypassing the internal LDO powered from V_IN whenever
EXTV_CC is higher than 4.7V. See EXTV_CC Connection in
the Applications Information section. Do not exceed 14V
on this pin.
PGND (Pin 21): Driver Power Ground. Connects to the
sources of bottom (synchronous) N-channel MOSFETs
and the (–) terminal(s) of C_IN.
V_IN (Pin 22): Main Supply Pin. A bypass capacitor should
be tied between this pin and the signal ground pin.
BG1, BG2 (Pin 23, Pin 18): High Current Gate Drives
for Bottom (Synchronous) N-Channel MOSFETs. Voltage
swing at these pins is from ground to INTV_CC.
BOOST1, BOOST2 (Pin 24, Pin 17): Bootstrapped Supplies
to the Topside Floating Drivers. Capacitors are connected
between the BOOST and SW pins and Schottky diodes are
tied between the BOOST and INTV_CC pins. Voltage swing
at the BOOST pins is from INTV_CC to (V_IN + INTV_CC).
SW1, SW2 (Pin 25, Pin 16): Switch Node Connections
to Inductors.
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