LTC3129_15 Datasheet, PDF (8/30 Pages) Linear Technology – 15V, 200mA Synchronous Buck-Boost DC/DC Converter with 1.3A Quiescent Current

LTC3129
PIN FUNCTIONS (QFN/MSOP)
BST1 (Pin 1/Pin 15): Bootstrapped Floating Supply for
High Side NMOS Gate Drive. Connect to SW1 through a
22nF capacitor, as close to the part as possible. The value
is not critical. Any value from 4.7nF to 47nF may be used.
V_IN (Pin 2/Pin 16): Input Voltage for the Converter. Connect
a minimum of 4.7µF ceramic decoupling capacitor from
this pin to the ground plane, as close to the pin as possible.
V_CC (Pin 3/Pin 1): Output voltage of the internal voltage
regulator. This is the supply pin for the internal circuitry.
Bypass this output with a minimum of 2.2µF ceramic
capacitor close to the pin. This pin may be back-driven by
an external supply, up to a maximum of 5.5V.
RUN (Pin 4/Pin 2): Input to the Run Comparator. Pull
this pin above 1.1V to enable the V_CC regulator and above
1.28V to enable the converter. Connecting this pin to a
resistor divider from V_IN to ground allows programming a
V_IN start threshold higher than the 1.8V (typical) V_IN UVLO
threshold. In this case, the typical V_IN turn-on threshold is
determined by V_IN = 1.22V • [1+(R3/R4)] (see Figure 2).
MPPC (Pin 5/Pin 3): Maximum Power Point Control Pro-
gramming Pin. Connect this pin to a resistor divider from
V_IN to ground to enable the MPPC functionality. If the V_OUT
load is greater than what the power source can provide,
the MPPC will reduce the inductor current to regulate V_IN
to a voltage determined by: V_IN = 1.175V • [1+(R5/R6)]
(see Figure 3). By setting the V_IN regulation voltage appro-
priately, maximum power transfer from the limited source
is assured. Note this pin is very noise sensitive, therefore
minimize trace length and stray capacitance. Please refer
to the Applications Information section for more detail
on programming the MPPC for different sources. If this
function is not needed, tie the pin to V_CC.
GND (Pin 6/Pin 4): Signal Ground. Provide a short direct
PCB path between GND and the ground plane where the
exposed pad is soldered.
FB (Pin 7/Pin 5): Feedback Input to the Error Amplifier.
Connect to a resistor divider from V_OUT to ground. The
output voltage can be adjusted from 1.4V to 15.75V by:
V_OUT = 1.175V • [1+(R1/R2)]. Note this pin is very noise
sensitive, therefore minimize trace length and stray ca-
pacitance.
NC (Pins 8, 9/Pins 6, 7): Unused. These pins should be
grounded.
PWM (Pin 10/Pin 8): Mode Select Pin.
PWM = Low (ground): Enables automatic Burst Mode
operation.
PWM = High (tie to V_CC): Fixed frequency PMW opera-
tion.
This pin should not be allowed to float. It has an internal
5M pull-down resistor.
PGOOD (Pin 11/Pin 9): Open drain output that pulls to
ground when FB drops too far below its regulated voltage.
Connect a pull-up resistor from this pin to a positive sup-
ply. This pin can sink up to the absolute maximum rating
of 15mA when low. Refer to the Operation section of the
data sheet for more detail.
V_OUT (Pin 12/Pin 10): Output voltage of the converter.
Connect a minimum value of 4.7µF ceramic capacitor from
this pin to the ground plane, as close to the pin as possible.
BST2 (Pin 13/Pin 11): Bootstrapped floating supply for
high side NMOS gate drive. Connect to SW2 through a
22nF capacitor, as close to the part as possible. The value
is not critical. Any value from 4.7nF to 47nF may be used.
SW2 (Pin 14/Pin 12): Switch Pin. Connect to one side of
the inductor. Keep PCB trace lengths as short and wide
as possible to reduce EMI.
PGND (Pin 15, Exposed Pad Pin 17/Pin 13, Exposed
Pad Pin 17): Power Ground. Provide a short direct PCB
path between PGND and the ground plane. The exposed
pad must also be soldered to the PCB ground plane. It
serves as a power ground connection, and as a means of
conducting heat away from the die.
SW1 (Pin 16/Pin 14): Switch Pin. Connect to one side of
the inductor. Keep PCB trace lengths as short and wide
as possible to reduce EMI.
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