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LTC3770 Datasheet, PDF (7/24 Pages) Linear Technology – Synchronous Controller with Margining, Tracking and PLL
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3770
Current Limit Foldback
160
VRNG = 1V
140
120
100
80
60
40
20
0
0 0.1 0.2 0.3 0.4
VFB (V)
0.5 0.6
3770 G21
Ion Current vs VIN
140
RON = 82k
120
100
80
60
40
20
0
0 5 10 15 20 25 30 35
INPUT VOLTAGE (V)
3770 G22
PI FU CTIO S (UH Package/G Package)
VRNG (Pin 1/Pin 4): Sense Voltage Range Input. The
voltage at this pin is ten times the nominal sense voltage
at maximum output current and can be set from 0.5V to 2V
by a resistive divider from INTVCC. The nominal sense
voltage defaults to 50mV when this pin is tied to ground,
200mV when tied to INTVCC. Do not set this voltage
between 0.5V to ground or 2V to INTVCC.
VFB (Pin 2/Pin 5): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
divider from VOUT.
ITH (Pin 3/Pin 6): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.75V corresponding to zero
sense voltage (zero current). There is an integrated ca-
pacitor of 20pF connected to this pin.
SGND (Pin 4/Pin 7): Signal Ground. All small-signal
components and compensation components should con-
nect to this ground, which in turn connects to PGND at one
point.
MARGIN1 (Pin 5/Pin 8): The MSB Logic Input for the
Margining Function. Together with the MARGIN0 pin
determines whether the IC is in margin high, margin low,
or no margin state. This pin has a 50k internal pull-down
resistor.
MARGIN0 (Pin 6/Pin 9): The LSB Logic Input for the
Margining Function. Together with the MARGIN1 pin
determines whether the IC is in margin high, margin low,
or no margin state. This pin has a 50k internal pull-down
resistor.
ION (Pin 7/Pin 10): On-Time Current Input. Tie a resistor
from this pin to ground to set the one-shot timer current
and thereby set the switching frequency.
VREFIN (Pin 8/Pin 11): Error Amplifier Reference Input.
The voltage at this pin must be greater than 0.5V and less
than 1V.
VREFOUT (Pin 9/Pin 12): Buffered Internal 0.6V Reference
Output. The maximum current sinking limit is 50µA at
this pin. Do not put a filter capacitor larger than 100pF on
this pin.
MPGM (Pin 10/Pin 13): Programmable Margining Input.
A resistor from this pin to ground sets the margining
current. This current, together with the resistor between
the VREFOUT and VREFIN pins, determines the margining
voltage offset.
TRACK/SS (Pin 11/Pin 14): Output Voltage Tracking and
Soft Start Input. When the IC is configured to be the master
of two outputs, a capacitor to ground at this pin sets the
ramp rate for the output voltage. When the IC is configured
3770f
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