LTC3409 Datasheet, PDF (7/16 Pages) Linear Technology – 600mA Low Vin Buck Regulator in 3mm x 3mm DFN

LTC3409
PI FU CTIO S
V_FB (Pin 1): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
GND (Pin 2): Ground Pin.
V_IN (Pins 3, 4): Main Supply Pins. Must be closely
decoupled to GND, Pin 2 and Pin 9, with a 4.7µF or greater
ceramic capacitor.
MODE (Pin 5): Mode Select Input. To select pulse skipping
mode, force this pin above 1.1V. Forcing this pin below
0.3V selects Burst Mode operation. Do not leave MODE
floating.
SW (Pin 6): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
RUN (Pin 7): Run Control Input. Forcing this pin above
1.1V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
SYNC (Pin 8): External CLK Input/Fixed Switching Fre-
quency Selection. Forcing this pin above 1.1V for greater
than 30µs selects 2.6MHz switching frequency. Forcing
this pin below 0.3V for greater than 30µs selects 1.7MHz
switching frequency.
External clock input, 1MHz to 3MHz frequency range.
When the SYNC pin is clocked in this frequency range the
SYNC threshold is nominally 0.63V. To allow for good
noise immunity, SYNC signal should swing at least 0.3V
below and above this nominal value (0.33V to 0.93V). Do
not leave SYNC floating.
GND (Pin 9): Exposed Pad. The Exposed Pad is ground. It
must be soldered to PCB ground to provide both electrical
contact and optimum thermal performance.
3409f
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